[SI-LIST] IBIS 5.0 model for DDR3 component
- From: GORAL Benoit <benoit.goral@xxxxxxxxxxxxxxx>
- To: "si-list@xxxxxxxxxxxxx" <si-list@xxxxxxxxxxxxx>
- Date: Thu, 12 Mar 2015 12:25:43 +0100
Hello experts,
In the frame of my research work for my Ph. D. thesis in the field of Power
Integrity, we are currently designing a test vehicle which implements an
interface between a FPGA and a DDR3 memory. The aim of this implementation is
SSN measurement and particularly, the noise rejected on the power planes due to
commutation. That's why I'm looking for DDR3 components described by IBIS 5.0
model for correlation between simulation and measurement. Signal between DDR3
and FPGA will be observed thanks to an interposer.
Problem is that I wasn't able to find one single DDR3 component modeled with
IBIS 5.0. I checked on manufacturer websites like Micron, Hynix, Samsung with
no particular access and couldn't find anything
I would be really thankful if you had in your possession IBIS 5.0 for DDR3
components and could share them with me.
Other possibility would be to use a LPDDR2 memory for which I was able to find
the model I'm looking for, but no interposer compatible with BGA footprint.
Maybe you could bring me some other leads, I haven't thought yet.
Best regards
Benoit GORAL
Ph. D. Student in Power Integrity Issues
Tel.: 02.41.64.58.56
Mail : benoit.goral@xxxxxxxxxxxxxxx<mailto:benoit.goral@xxxxxxxxxxxxxxx>
THALES COMMUNICATIONS & SECURITY S.A.S
110 avenue Leclerc
BP 70945_49309 Cholet
www.thalesgroup.com<http://www.thalesgroup.com>
[cid:image001.png@01D05CBA.6C7FED60]<http://www.thalesgroup.com/live>
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