[SI-LIST] Re: Hyperlynx vs. Hspice

  • From: Duane Takahashi <duanet@xxxxxxxxxxxxxxxxxxxxxx>
  • To: si-list@xxxxxxxxxxxxx
  • Date: Fri, 26 Sep 2003 17:55:52 -0700

I've also used XTK in the same frequency, and have gotten good 
correlation with lab data.  My XTK model were generated from XTK and 
HSPICE data as well.

Duane

> OK,
> I have used XTK to simulate multiple boards connected to a backplane in the
> LOW Ghz frequency range signals. We got acceptable (which means within
> manufacturing tolerance) results from the simulations. We did a lot of work
> to sync in the models (they were XTK models derived from HSPICE or IBIS).
> 
> The boards had good complete grounds, the connectors were well grounded.
> 
> There, I stood up.
> 
> 
> -----Original Message-----
> From: si-list-bounce@xxxxxxxxxxxxx
> [mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of Chris Cheng
> Sent: Friday, September 26, 2003 4:26 PM
> To: 'signalintegrity@xxxxxxxxxxx'; jonpowell@xxxxxxxxxxxx
> Cc: naveenr@xxxxxxxxxxxxxxx; si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] Re: Hyperlynx vs. Hspice
> 
> 
> Naveen,
> The real question you have to ask yourself is what is the correct strategy
> to design these >GHz systems.
> The last time I remember I did a full extraction of the PCB and back
> annotate with simulations to analyze SI and timing was over ten years ago.
> The truth is for the past few years, especially when buses go above GHz, I
> found myself using the ruler or measurement tool on a post route PCB design
> more than SPICE or any analog simulators. The performance requirement is
> high enough that all the analysis has to be done up front before you connect
> a single dot in your PCB routing tool. Min/max bus length, stub length
> allowance, parallelism spacing and match length requirement etc have to be
> well analyzed and spec out before you route your PCB. When the board is
> done, you use your DRC checker or measurement tool to make sure the routing
> is done the way the rules require and you send the board out. If you think
> you can just throw the board to a PCB designer and use ANY tool (SPICE or
> Hyperlynx or whatever) to analyze the results to give yourself a go or no go
> on the post route nets, you will be in for a big surprise when bad things
> happen.
> You also mentioned designing backplanes. I will be really impressed if any
> of the extraction tools can properly exact mulitple nets from mulitiple
> board and couple them with the proper connector models and automatically do
> the analysis for you.
> I gave up on the SPICE vs. IBIS argument long time ago so for those who put
> their money where their mouth is and really use IBIS to analyze multi GHz
> system, good for you. Like Eminem says, will the real Gb/s IBIS users please
> stand up, please stand up....
> 
> -----Original Message-----
> From: Stephen Zinck [mailto:signalintegrity@xxxxxxxxxxx]
> Sent: Friday, September 26, 2003 3:33 PM
> To: jonpowell@xxxxxxxxxxxx
> Cc: naveenr@xxxxxxxxxxxxxxx; si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] Re: Hyperlynx vs. Hspice
> 
> 
> FYI...
> 
> Another tool that extracts board level topologies (uncoupled and coupled
> tlines - T and W elements, terminations, vias, etc.) from Allegro, Pads
> and others? is SIAuditor from Sisoft (sisoft.com). It also provides a
> host of other features (crosstalk, SSO, static timing analysis among
> many more) that runs ontop of Hspice. And because the tool can utilize
> IBIS models that can be "test-benched" against the real encrypted Hspice
> model, you can do board level pre and post route SI and timing analysis
> with these "verified" IBIS models in an short amount of time. They say
> it analyzes a net just as fast as SpectraQuest because of this! And it
> can be "server-farmed" if needed on Solaris/WINX. Sounds like I am
> selling the tool (I'm not) but this sort of tool could prove very useful
> when many highly accurate simulations are required - which is why I am
> evaluating it :-).
> 
> Good luck.
> Steve
> 
> Stephen P. Zinck
> Interconnect Engineering
> 25 Bennett Lot Road
> South Berwick, ME 03908
> Phone - (207) 384-8280
> Fax - (207) 384-5388
> Email - szinck@xxxxxxxxxxxxxxxxxxxxxxxxxxx
> Web - www.interconnectengineering.com
> 
> Jon Powell wrote:
> 
> 
>>Converting HSPICE models to IBIS is not normally a job for a novice (in
>>either SPICE, IBIS, or the expected circuit performance). For modern
> 
> devices
> 
>>you have elements that cannot be supported by IBIS or IBIS-only simulators.
>>There are some mixed SPICE/IBIS simulators out there but if your HSPICE
>>models are encrypted, then you will still need a copy of HSPICE.
>>On the other hand, trying to do anything approaching full board simulation
>>with HSPICE alone can be a problem (problem 1: Where do you get the SPICE
>>models for the tlines auto-extracted from your layout) and Hyperlynx is
>>pretty good at this.
>>
>>As far as the model conversion to IBIS, you might check with Mentor
>>Consulting or Scott McMorrow at teraspeed.
>>
>>-----Original Message-----
>>From: si-list-bounce@xxxxxxxxxxxxx
>>[mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of Naveen Reddy
>>Sent: Friday, September 26, 2003 10:38 AM
>>To: si-list@xxxxxxxxxxxxx
>>Subject: [SI-LIST] HyperLynx vs Hspice
>>
>>
>>Hi Everybody:
>>I need to perform some high speed simulations (over 3GHz) for my
>>backplane and I currently have the Mentor HyperLynx tool. I have run
>>into a little problem. HyperLynx needs IBIS models for simulation
>>purposes, whereas most of the vendors provide only spice models and not
>>IBIS. Although HyperLynx can convert Spice models to IBIS, it does need
>>a Spice simulator to do that.
>>
>>I am a little confused here and am hoping I can have these questions
>>answered.
>>
>>1. Can I use just Hspice to perform all my high speed simulations or is
>>HyperLynx a better tool for this application?
>>2. Has anyone had experience with converting 3D spice models to IBIS?
>>What are the tradeoffs?
>>3. HyperLynx has three levels of licenses - regular, EXT and GHZ. Which
>>one should I be using?
>>
>>Thanks in advance.
>>
>>-Naveen.
>>
>>
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