[SI-LIST] HyperLynx Lunch and Learn

From: "Z_Hashemi" <z_hashemi@xxxxxxxxx>
To: si-list@xxxxxxxxxxxxx
Date: Mon, 31 Mar 2003 04:22:33 -0000

Attend a FREE "Lunch and Learn" seminar to learn how HyperLynx can 
enable you to quickly and easily perform signal integrity (SI) 
analysis for PCB boards. 

We'll show you how to get your boards done quickly and correctly, 
even if you don't have the time to learn overly complex signal 
integrity software tools. In this seminar, you'll learn about:

Proactive analysis of driver strength, net topology and termination, 
as well as their effects on both signal integrity and EMC 

Lossy lines, and frequency-dependent via modeling 

Multi-bit stimulus, jitter, and eye diagrams 

Simultaneous simulation with HSPICE and IBIS models 

See for yourself why HyperLynx is considered the industry standard 
for quick, accurate, easy-to-use signal integrity analysis tools.

A free lunch follows the event. Seating is limited, so register now 
to reserve your space. We will call to confirm your attendance and 
provide directions.

Who should attend?

Engineers and managers involved in high-speed system design -- 
particularly in rapid prototyping environments where return on tool 
investment is critical 

Anyone concerned about high-speed design -- even if you're not a 
signal integrity expert 

Current HyperLynx customers who want to learn about our newest 
release, v7.0 

Time and Location

April 10, 2003 11:00 AM to 2:00 PM

1001 Ridder Park Drive San Jose, CA

To Register:
Send an email to zobair_hashemi@xxxxxxxxxx or call 408-487-4846.


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[SI-LIST] HyperLynx Lunch and Learn

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