[SI-LIST] Re: Hspice simulator for board designs
- From: "Scott McMorrow" <scott@xxxxxxxxxxxxx>
- To: sidney16481@xxxxxxxxx
- Date: Wed, 11 Jun 2003 00:08:12 -0700
Sidney,
There are several solutions from several vendors.
SiSoft provides a comprehensive simulation and timing analysis
capability using Hspice. They can extract board databases from Cadence
(and possibly other tools) and perform extensive SI simulations using
Hspice as the target simulator.
Hyperlynx, Cadence, Mentor all provide methods to export designs to
Hspice and either co-simulate or integrate the simulation into their
environment.
There may be others that I do not know about.
regards,
scott
--
Scott McMorrow
Teraspeed Consulting Group LLC
2926 SE Yamhill St.
Portland, OR 97214
(503) 239-5536
http://www.teraspeed.com
Sidney S wrote:
>Hello,
>We are exploring the possibilities if using Hspice simulator for motherboard
>designs (for mailnly post layout). But Hspice does not have the option of
>directly importing the routed board file.
>Hence can anybody suggest any method for doing post layout simulation on a
>routed board file using Hspice?
>
>Looking forward for your reply!!!
>
>Thanks,
>Sidney
>
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