[SI-LIST] Re: How to place the AC coupling capacitor of the serdes?
- From: "Wei Zhou" <wzhou@xxxxxxxxxxx>
- To: <levinpa@xxxxxxxxxxxxx>, <martin.bahlinger@xxxxxxxxx>
- Date: Fri, 18 Jan 2008 09:36:50 -0800
For PCI Express, the AC coupling caps bear another critical role during
the device detection process. PCIE link started with TX sending out
pulse to charge up the AC coupling cap, based on the time that is needed
to charge up the cap, devices make a decision on whether the other end
is present or not.
One might naturally draw the AC coupling cap on the TX side considering
this functionality of the cap.
Regards,
Wei
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of Paul Levin
Sent: Friday, January 18, 2008 9:15 AM
To: martin.bahlinger@xxxxxxxxx
Cc: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: How to place the AC coupling capacitor of the
serdes?
Dear Liu,
Back in the early days of Fibre Channel we debated this. It turns out
that
there was an additional, non signal integrity argument: Suppose that you
were to accidentally short the signal pins of a driver-connected cable
to
ground; some drivers (particularly those that were similar to PECL) may
be
damaged by the excess dc current. Shorting the pins of a
receiver-connected
cable to ground was less likely to damage the part.
This argument notwithstanding, FC-PI mandated dc-blocking the receiver.
Regards,
Paul Levin
Xyratex
______________________
Bahlinger, Martin wrote:
> Hi Liu,
>
> Several times I searched for an answer to this question on the web and
> could not find any clue. I also asked a Gigabit serdes expert on this
> subject and all I got was: One needs the caps, but it does not matter
> whether they are placed at the receiver or at the transmitter.
>
> To have some rule on this in the PCIe spec is necessary, because quite
> often communicating devices are developed by different parties. Thus
> this rule ensures to not miss the caps on any lane. But why they chose
> TX and not RX? No idea...
>
>
> Regards
> Martin
>
>
> -----Original Message-----
> From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx]
> On Behalf Of liuluping 41830
> Sent: Freitag, 18. Januar 2008 05:11
> To: si-list@xxxxxxxxxxxxx
> Cc: oukanghua@xxxxxxxxxx
> Subject: [SI-LIST] How to place the AC coupling capacitor of the
serdes?
>
> Dear si-listers:
> AC coupling per the PCI Express Base Specification Revision 1.0a,
> section 4.3.1.2 dictates AC coupling to be placed as
> close as practical to the transmitter buffer.=3D20
> We consider that the AC cap is used to ensure the DC bias levels of
the
> transmitted signal do not adversely
> affect the receiver,and most of time place it clsoe to the receiver
> side.Why the PCIe requires to put it on the TX side?
> Is it differ from different serdes interface?
>
> Thanks and Regards,
>
> LIU Luping
>
> =3D20
>
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