[SI-LIST] Re: How to measure the On Die decupling capacitor value ?

  • From: Hermann Ruckerbauer <hermann.ruckerbauer@xxxxxxxxxxxxx>
  • To: si-list@xxxxxxxxxxxxx
  • Date: Tue, 14 Sep 2010 21:41:10 +0200

just as I have read point no 1 to 3 :
in this case of course it would be interesting which device it is (I
have not followed this thread) ... if it is a DRAM memory device it
might use it's storage capacitor for Decoupling and this might behave
different to the mentioned kinds of capacitors ...

Hermann

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Hermann Ruckerbauer
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schrieb Cosmin Iorga:
> A few more comments:
> On-chip decoupling capacitance typically consists of: 
>
> 1. Device capacitance: this is PN junction type capacitance that varies with 
> the 
> bias voltage.  
>
> 2. �Metal to metal� capacitance on metal layers, which looks like the 
> classic 
> parallel plate capacitors and does not depend on bias
> 3. Decoupling MOS gate type capacitors, which depend on bias voltages and 
> frequency
>
> These are not ideal capacitors, and they have ESL, ESR, and resonant 
> frequency.  
> Also, the on-chip capacitors decouple high dI/dt transients that cannot pass 
> through the bond wire inductance into the external PDN, so if you use a low 
> frequency measurement technique you may not know what impedance these 
> capacitors 
> have at their intended operating frequency.  The only efficient method I know 
> to 
> determine the on-chip capacitance of an arbitrary integrated circuit is 
> modeling 
> and correlation with measurements on a chip/package/PCB structure if you have 
> any (eval board will work just fine).
>
> Cosmin Iorga,
> NoiseCoupling.com
> http://www.noisecoupling.com
>
>
>
>
>
> ________________________________
> From: yardala <yardala@xxxxxxxxx>
> To: si-list@xxxxxxxxxxxxx
> Sent: Fri, September 10, 2010 7:15:21 PM
> Subject: [SI-LIST] How to measure the On Die decupling capacitor value ?
>
> Hi, All
> Can I measure the value of On Die Decoupling capacitor use only capacitor
> meter
> probing at  pin Vdd and Vss ?
>
> When I use meter to measure the value of core logic are few nH and unstable,
> the value of I/O power are several hundred pF.
>
> Does these value make sense ? does it good enough , or any other methods are
> suggest ?
>
> Does the bonding wire effect the capacitor value ?
>
> Thanks!
>
> Yardala
>
>
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