[SI-LIST] Re: How to embedded and to deembedded the clock to serial signal, such as GE and PCI-E
- From: l30136 <zhenhong.sz@xxxxxxxxxx>
- To: qzheng.hb@xxxxxxxxx, wzhou@xxxxxxxxxxx
- Date: Wed, 05 Apr 2006 15:11:49 +0800
In one of our cases,zhangkun and me find GE is so sensitive to crosstalk.
we use oscilloscope find the eye is perfect, when we disable the GE,we can find
GE has only 70mv crosstalk from others signal.
Even we add 70mv crosstalk to the eye , the perfect eye still will not touch
the GE eye pattern(the pattern state by IC manufacturer).
Why little crosstalk will result in bit error?
Best Regards
li zhen hong
----- Original Message -----
From: "zheng qi" <qzheng.hb@xxxxxxxxx>
To: <wzhou@xxxxxxxxxxx>
Cc: <zhang_kun@xxxxxxxxxx>; "si-list" <si-list@xxxxxxxxxxxxx>
Sent: Wednesday, April 05, 2006 2:13 PM
Subject: [SI-LIST] Re: How to embedded and to deembedded the clock to serial
signal, such as GE and PCI-E
> Refer to http://bwrc.eecs.berkeley.edu/classes/EE290C_S04/
>
> I feel the third reason will have the most possibilities .because PLL is
> more sensitive to low frequency noise . which is always the main part of
> the noise of the supply .
>
> Regards
> zheng qi
>
> ************************************
> qzheng@xxxxxxxxxxxxxxxx
> <qzheng.hb@xxxxxxxxx >
> 2006-4-5
> ************************************
>
> 2006/4/5, Wei Zhou <wzhou@xxxxxxxxxxx>:
> >
> > Zhangkun,
> >
> > A typical serial link like PCIE, GE have a PLL on the TX side and a clock=
> data recovery circuit (CDR) on the RX side. The TX PLL multiply the refere=
> nce clock up and latch data out. In a lot serial links, data is 8B/10B enco=
> ded to ensure enough transition edges for the CDR to recover the clock. In =
> that sense, the clock is "embedded".
> >
> > The CDR on the RX side will try to figure out the right timing to sample =
> data based on the data transition it was seeing. The CDR fundamentally is a=
> nother PLL, the loop inside the CDR move the sampling edge back and forth t=
> o have it centered around the center of the data eye, thus recovering or "d=
> e-embeding" the clock and use the recovered clock to latch in data.
> >
> > Wei
> >
> > -----Original Message-----
> > From: si-list-bounce@xxxxxxxxxxxxx on behalf of Zhangkun
> > Sent: Tue 4/4/2006 8:51 PM
> > To: si-list
> > Subject: [SI-LIST] How to embedded and to deembedded the clock to serial =
> signal, such as GE and PCI-E
> >
> > Dear all
> > Recently, in our product, there is some problem in our product. The seria=
> l signal, such as GE and PCI-E, has error bits. We have found out the reaso=
> n:
> > 1.The serial signal has crosstalk.
> > 2.The clock signal to PLL has crosstalk.
> > 3.The analog power of the PLL or the serial signal driver has large po=
> wer noise.
> >
> > I guess the basic reason is that the jitter of clock. Could anybody expla=
> in to me how the clock signal is embedded to and deembedded from the serial=
> signal?
> >
> > Best Regards
> >
> > Zhangkun
> > 2006.4.5
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