[SI-LIST] Help to see the DDR differential clock waveform in PCB

  • From: hai tian <tian_h2001@xxxxxxxxx>
  • To: si-list@xxxxxxxxxxxxx
  • Date: Sun, 19 Oct 2003 18:15:39 -0700 (PDT)

hi,
We have problem of DDR SDRAM diffential clock from
controller chip to DDR sdram in PCB board. Could you 
please help to check the attached waveform? 

The waveform 1/4 are tested directly from the asic
chip, It looks ok. but the 2/3 wavefrom which test at
DRAM looks not good. The pcb board just use normal
22ohm serial termination. 

Which things will cause the bad waveform?

Thanks a lot.

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  • » [SI-LIST] Help to see the DDR differential clock waveform in PCB