[SI-LIST] Help: how to create IBIS model for a chip which contains two dies
- From: Lu@xxxxxxxxxx
- To: si-list@xxxxxxxxxxxxx
- Date: Wed, 16 Apr 2003 17:50:08 -0400
Hello Guys,
I am new to the IBIS model creation. I have some questions about how to
create IBIS model for a chip which contains two dies. especially in the
following case:
There is an I/O buffer in die 1, which connects to another I/O buffer in
die 2, then to the pin.
+--------------------------------*--------+
| | |
| +------------------+---+ |
| | | |
| | | |
| +-----*--+ +------*----+ |
| | | | | |
| | | | | |
| | die 1 | | die 2 | |
| | | | | |
| +-----*--+ +------*----+ |
| |
| |
| |
| chip |
+-----------------------------------------+
1. How can I choose the model for this pin, say I already have models for
each I/O buffers?
2. Is R_pkg, L_pkg and C_pkg is sufficient to model the trace among 2 I/Os
and pin?
3. which IBIS version should I use: 2.1 or 3.2?
I'll appreciate if you give me any opinions or suggestions. Thanks.
*************************
Lixin Lu
IC CAD Specialist
MOSAID Technologies Inc.
11 Hines Road,
Kanata, Ontario
Canada K2K 2X1
(613) 599 9539 ext 1638
*************************
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