Hi, I have been trying hard to look for Senior Design Engineers with Xilinx Virtex 2 Pro. Is there anyone who can help me? Within a short span of time my client has created a niche for themselves already. They have created a revolutionary new technology for wire speed applications that reduce costs, enhance existing network services, and enable new services to be quickly deployed across multiple markets. My client is presently for a Senior FPGA Design Engineer with at least 8 years experience in high performance Ethernet processing and routing equipment. As a Senior FPGA Design Engineer, you will be developing high speed processing of Ethernet packets, interfacing to ternary CAMs and the latest generation of NPUs. You must have experience with high speed Xilinx Virtex II Pro devices including IP cores, PowerPC and Rocket IOs. Location is Santa Clara, California and Salary is $90,000 to $120000. Any help would be highly appreciated. Thankyou for your time. Regards, Avani OS2i Researcher www.OS2i.com ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List technical documents are available at: http://www.si-list.org List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu