Hi Tom and Ray: I thought The High Speed Current Steering Logic is very similar to LVPECL ,like twins, and it's no need to spec it. The most detailed artile about this topic I've got yet is: "Differential Output Terminations LVPECL, HCSL, LVDS, and CML" page5 http://www.sitime.com/support/documents/AN10009_Differential_Terminations.pdf Maybe contact the designer of this comapany will get some helpful information. Best Regards, LIU Luping CAD/SI Engineer Huawei Technologies Co.,Ltd ***************************************************************** This e-mail and its attachments contain confidential information from HUAWEI, which is intended only for the person or entity whose address is listed above. Any use of the information contained herein in any way (including, but not limited to, total or partial disclosure, reproduction, or dissemination) by persons other than the intended recipient(s) is prohibited. If you receive this e-mail in error, please notify the sender by phone or email immediately and delete it! *********************************************** Msg: #5 in digest Subject: [SI-LIST] Re: HCSL Date: Thu, 9 Sep 2010 16:14:03 -0700 From: Ray Anderson <ray.anderson@xxxxxxxxxx> Tom- As far as I was able to determine, the only place that the HCSL spec is documented is/was in the FB-DIMM spec. Seems strange, but I guess the JEDEC guys didn't think it warranted a standalone document. A number of various manufacturer's data sheets have info on HCSL voltage swing etc., but they all seem to lead back to the FB-DIMM document. If anyone knows of a more definitive spec I'd like to hear about it. -Ray Raymond Anderson Senior Signal Integrity Staff Engineer Programmable Platforms Development Silicon Technology Group Signal Integrity and Package Development Department Xilinx Inc. 2100 Logic Drive San Jose, California 95124 (408) 626-6277 -----Original Message----- From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On Behalf Of Thomas Biggs Sent: Thursday, September 09, 2010 3:53 PM To: si-list@xxxxxxxxxxxxx Subject: [SI-LIST] HCSL Ray Anderson had asked this question back in 2005, though I saw no reply. Is there some kind of official HCSL (high-speed current steering logic) specification? If so, where can I find it? I see references to it in the JEDEC JESD8-18A FB-DIMM spec and in some PCIe specs, but have found no spec for HCSL by itself. -tom ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List technical documents are available at: http://www.si-list.net List archives are viewable at: //www.freelists.org/archives/si-list Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu