Tim,
If you recall, the second part of the discussion was that I/O that enters or
exits the Faraday cage on sides of the product away from where you connected
logic ground to the Faraday cage, you have to do one of two things.
Either you place low pass filters on those lines so EMI cannot exit by that
path or you use shielded cables.
Hope this helps.
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On ;
Behalf Of Tim Smith
Sent: Tuesday, January 17, 2017 4:07 PM
To: ken@xxxxxxxxxxxxxxxx
Cc: istvan.novak@xxxxxxxxxxx; Lee Ritchey <leeritchey@xxxxxxxxxxxxx>; si-list
<si-list@xxxxxxxxxxxxx>
Subject: [SI-LIST] Re: Ground Article
Hi Lee,
Great article, but I must ask: I assume that it is undesirable to have currents
flowing through the Faraday cage.
I recall from one of your courses you said tie the 0V reference plane to the
cage at a single point near where the IO enters/exits the cage.
What should one do when there are two regions in the "chassis" where IO
attaches?
Many thanks.
Dr. Timothy Smith
Zetski Systems Consulting
On Wed, Jan 18, 2017 at 10:32 AM, Ken Wyatt <ken@xxxxxxxxxxxxxxxx> wrote:
Argh, my apologies Istvan. I indeed misread your description, as
pointed out by two of our colleagues, Vinu and Bert.
Yes, I agree that there are cases where planes may be split for
various reasons - mainly isolation, etc. We just need to be sure not
to cross that split with clock or other high-speed traces.
Crawling back into the woodwork… :-)
Cheers, Ken
_______________________
I'm here to help you succeed! Feel free to call or email with any
questions related to EMC or EMI troubleshooting - at no obligation.
I'm always happy to help!
Kenneth Wyatt
Wyatt Technical Services LLC
56 Aspen Dr.
Woodland Park, CO 80863
Phone: (719) 310-5418
Email Me! <mailto:ken@xxxxxxxxxxxxxxxx> | Web Site <
http://www.emc-seminars.com/> | Blog <http://design-4-emc.com/> The
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Subscribe to Newsletter <http://www.emc-seminars.com/ ;
Newsletter/Newsletter.html> Connect with me on LinkedIn
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On Jan 17, 2017, at 1:05 PM, Ken Wyatt <ken@xxxxxxxxxxxxxxxx> wrote:especially in very dense designs. You mentioned some cases where
Hi Istvan,
I would have to agree there can be many trade-offs in board designs
-
splits were OK and I’d be interested in any additional specific
conditions where splitting the return (or reference) plane is OK from
a SI or EMI point of view, or can even make it better, as you point out.
say) clocks or other digital signals cross a gap in the return plane,
In general, my experience has been in cases where high speed (>100
kHz,
common mode harmonic currents are produced, which can create not only
crosstalk to victim traces, but worse, these currents can flow out the
outside of I/O cable shields, creating the potential for radiated
emissions. I understand there are situations where this can’t be
helped and I do believe there are cases where this doesn’t matter much.
https://youtu.be/L44lTnQgv-o
I created a short video demonstration of this effect.
questions related to EMC or EMI troubleshooting - at no obligation.
Cheers, Ken
_______________________
I'm here to help you succeed! Feel free to call or email with any
I'm always happy to help!
http://www.emc-seminars.com/> | Blog <http://design-4-emc.com/>
Kenneth Wyatt
Wyatt Technical Services LLC
56 Aspen Dr.
Woodland Park, CO 80863
Phone: (719) 310-5418
Email Me! <mailto:ken@xxxxxxxxxxxxxxxx> | Web Site <
The EMC Blog (EDN) <http://www.edn.com/blog/The-EMC-Blog>Newsletter/Newsletter.html>
Subscribe to Newsletter <http://www.emc-seminars.com/
Connect with me on LinkedInwrote:
<http://www.linkedin.com/in/kennethwyatt>
On Jan 16, 2017, at 9:05 PM, Istvan Novak
<istvan.novak@xxxxxxxxxxx>
Martin
Lee,
Nice article and I agree with most of what you say, though I still
would not use extreme phrases, like on page 6 you say "Splitting a
ground plane destroys its integrity as an ultralow impedance
connection between all of the components in a circuit and should
never be done." I agree that the reference (ground) plane is very
important and we should make sure it can serve its purpose
properly. However, in complex and high density designs there are
several conflicting requirements and sometimes making careful
splits on the ground planes are not only OK, it will make the
product outright better. There are occasions, for instance, when
we need to equalize and optimize the DC drop on planes and in
addition to optimizing the placement of components, we can also
help by splitting the planes, power and/or reference planes. If
signal traces are naturally routed alongside the split without the
need to cross it, the signaling will be OK. There are real, working
products with split ground planes.
Regards,
Istvan Novak
Oracle
On 1/16/2017 6:53 PM, Lee Ritchey wrote:
A few weeks ago we had a prolonged exchange on what ground is.
With
section onRowe, we did an article that appeared on the UBM site with this URL.
http://ubm.io/2ikEDat
I wrote another article that includes this as well as an expanded
article isEMI and ground and Faraday Cages and how they contain EMI. That
firstnow posted on the Speeding Edge web site, www.speedingedge.com
<http://www.speedingedge.com> for any who want to go beyond what
the
topic.article covered.
Hope both of these help clear up some of the confusion around this
See you all at DesignCon in Santa Clara at the end of the month.
By the way, I am planting flowers in my ground this month!
Lee Ritchey
Speeding Edge
P.O. Box 2194
Glen Ellen, CA
95442
707-568-3983
I just used the energy it takes
To get mad and wrote some blues.
Count Basie
Or:
Worry is like a rocking chair,
It keeps you busy but.
It doesn't get you anywhere.
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