[SI-LIST] Fwd: Re: Digest Number 885
- From: Michael Sachtjen <walldrug1316mi@xxxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Mon, 27 Oct 2003 17:16:18 -0800 (PST)
A similar question was posted in July and a lot of
good suggestions were made. Look for "High Speed
Design Books.." in the archive.
Hope this helps.
--- s s <ssankarsin24@xxxxxxxxx> wrote:
> Date: Mon, 27 Oct 2003 09:47:08 -0800 (PST)
> From: s s <ssankarsin24@xxxxxxxxx>
> Subject: [SI-LIST] Re: Digest Number 885
> To: si-list@xxxxxxxxxxxxx
>
> Hi All,
> I am a student and am interested in learning SI . I
> was wondering if someone could please suggest me
> some introductory books on SI.
>
> Thanks
> Shankar
> si-list@xxxxxxxxxxxxxxx wrote:
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> There are 10 messages in this issue.
>
> Topics in this digest:
>
> 1. Re: Sacrificial ground: Is it useful?
> From: MikonCons@xxxxxxx
> 2. testing
> From: "A.Z."
> 3. Field-solver
> From: "elecqs"
> 4. Re: Sacrificial ground: Is it useful?
> From: MikonCons@xxxxxxx
> 5. About the limit of minimum length
> From: "Fu, Greg (¸¶?V²Ù IES)"
> 6. Re: What are the differencs between W, T and
> U-element of a tranmission line model?
> From: Sudheer B S
> 7. Re: What are the differencs between W, T and
> U-element of a tranmission line model?
> From: "Jack"
> 8. Re: Sacrificial ground: Is it useful?
> From: Geoff Stokes
> 9. Re: How to build a variable resistor in HSPICE
> From: Antonio Girardi
> 10. Re: What are the differences between W, T and
> U-ele ment of a transmission line model?
> From: "Clewell, Craig"
>
>
>
________________________________________________________________________
>
________________________________________________________________________
>
> Message: 1
> Date: Sun, 26 Oct 2003 18:00:28 EST
> From: MikonCons@xxxxxxx
> Subject: Re: Sacrificial ground: Is it useful?
>
> John:
> You were wondering about the source for
> chassis-grounded guard traces around
> PCBs. I believe I'm the guilty party. Back in 1989,
> I devised a method to
> protect board devices from ESD while reducing
> radiated emissions as well. I
> generated the concept with the following guidelines.
>
> Place a ring around the PCB periphery of 50 (or
> more) mils width on EVERY
> layer. The outter layers should have a soldermask
> setback (i.e.,to expose the
> conductor). Use stagger-spaced vias to connect all
> rings, forming a low
> inductance conducting strap around the PCB
> periphery. The ring structure should be
> connected to the primary signal reference entry
> point (generally at a connector
> interface).
>
> The guard ring concept has multiple purposes:
> a) Providing a field termination point for radiated
> emissions originating on
> the PCB.
> b) Providing a sacrificial/preferred ESD strike area
> with a current
> distribution mechanism.
>
> Item (a) is most beneficial where common-mode
> excitation exists on the planes
> (e.g., in the case of planar resonances) of the PCB,
> but also serves to
> intercept signals from the many inadvertent loop and
> monopole antennas that are
> unavoidably formed in most any PCB layout. The ring
> provides the preferred path
> back to the local ground reference for the PCB.
> Hence, the ring provides a
> local termination and return path for any fields
> emanating from the PCB circuits
> and power/ground plane edges.
>
> Item (b), by virtue of an exposed conductive
> structure, presents the most
> likely strike area for any ESD buildup. The low
> inductance of the parallelled
> layer structure minimizes potential differences
> around the PCB. If a strike
> occurs, the charge is quickly distributed around the
> PCB and is fed into the PCB
> interior via the primary reference ground connection
> and appears as common-mode
> voltage to the PCB circuits. Theh result is minimal
> disturbance (under the
> circumstances
>
>
>
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________________________________________________________________________
>
> Message: 2
> Date: Sun, 26 Oct 2003 15:09:55 -0800
> From: "A.Z."
> Subject: testing
>
> test
>
>
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>
> Message: 3
> Date: Sun, 26 Oct 2003 15:20:07 -0800
> From: "elecqs"
> Subject: Field-solver
>
> Hi, up to what frequency has the internal
> field-solver of Hspice been
> correlated?
> Rgds,
>
>
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>
> Message: 4
> Date: Sun, 26 Oct 2003 18:28:55 EST
> From: MikonCons@xxxxxxx
> Subject: Re: Sacrificial ground: Is it useful?
>
> Darn, sorry guys, but I lost over half of my
> comments to John on the last
> E-mail. I didn't save it, so here's a brief summary
> of what "disappeared."
> The result is minimal disturbance (under the
> circumstances) because of the
> use of the low inductance current path and the
> lowest current density entry
> point to the internal circuits of the PCB.
>
> RE: Capacitors around the periphery
>
> I recommended PROVISIONS for "spoiler" capacitors be
> spaced around the ring
> at varying intervals. Because the ring forms a loop
> antenna that is resonant
> at a low to intermediate frequency, a susceptibility
> coul be encountered,
> depending on the using environment. If so, addition
> of either capacitors or low
> value damping resistors could be used to "spoil" or
> significantly reduce the
> susceptibility. These mounting provisions are not
> recommended to be populated
> unless a problem is encountered.
>
> The guard ring approach solved many ESD problems,
> particularly on portable
> designs. I presented the concept in lectures across
> the US and Europe, as well
> as incorporating custom variations in many designs
> over the years. Perhaps many
> designers now use the concept without understanding
> whether they have need
> for it in their particular design.
>
> I had considerably more to comment, but don't have
> any more time now.
>
> Have fun,
>
>
> Mike
>
> Michael L. Conn
> Owner/Principal Consultant
> Mikon Consulting
> Cell: 408-821-9843
>
> *** Serving Your Needs with Technical Excellence ***
>
>
>
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>
________________________________________________________________________
>
> Message: 5
> Date: Mon, 27 Oct 2003 10:09:17 +0800
> From: "Fu, Greg (¸¶?V²Ù IES)"
> Subject: About the limit of minimum length
>
> Content-Type: text/plain;
> charset="GB2312"
> Content-Transfer-Encoding: quoted-printable
> Hi, guru:
> I am a novice on this mail list, I have a simple
> problem.
> The model is described:
> =20
> The design has a rule, which is the length of driver
> to via must be =
> among minimum length and maximum length. But the
> problem is why it has a =
> minimum length? We know, when the length is longer,
> crosstalk maybe =
> increases much. Why ? Anyone who can explain in
> examples will be greatly =
> appreciated. Thanks in advance.
> =20
> Best regards,
> Greg
> Mailto:fu.greg@xxxxxxxxxxxx=20
> Inventec(ShangHai) Co.,Ltd. =20
> =20
>
>
>
> -- Binary/unsupported file stripped by Ecartis --
> -- Type: image/gif
> -- File: image001.gif
> -- Desc: image001.gif
>
>
>
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________________________________________________________________________
>
> Message: 6
> Date: Mon, 27 Oct 2003 10:11:44 -0500
> From: Sudheer B S
> Subject: Re: What are the differencs between W, T
> and U-element of a tranmission line model?
>
> T : Lossless transmission line model , single signal
> only
> Can be used for reflection analysis when lengths are
> less than
> the critical length
> U: Lossy Transmission lines allows upto few lines i
> am not sure of
> this no
> probably 4
> W : Lossy Transmission line , Fast , accurate and
> robust than U
> element and you can simulate
> any no of signals
>
>
>
> Regards
> SUDHEER
>
> lee yang wrote:
>
> >Hi all,
> >Any explaination or material on these is much
> appreciated!
> >-LY
> >
> >
> >
> >
> >>From: "lee yang"
> >>Reply-To: changly_80@xxxxxxxxxxx
> >>To: si-list@xxxxxxxxxxxxx
> >>Subject: [SI-LIST] What are the differencs between
> W, T and U-element of a
> >>tranmission line model?
> >>Date: Tue, 21 Oct 2003 11:05:41 +0000
> >>
> >>Hi,
> >>
> >>Could some one explains that what are the
> differences between W, T and
> >>U-element of a transmission line model? How do i
> know which type of
> >>transmission line model should I use in my
> simulation?
> >>Thanks.
> >>
> >>Regards,
> >>LY
> >>
>
>>_________________________________________________________________
> >>Are you in love? Find a date on MSN Personals
> http://match.msn.com.my/
> >>
>
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> >>
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>_________________________________________________________________
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>
> Message: 7
> Date: Sun, 26 Oct 2003 21:25:55 -0800
> From: "Jack"
> Subject: Re: What are the differencs between W, T
> and U-element of a tranmission line model?
>
> All,
>
> Could someone refresh my memory:
> Field solver like Maxwell 2D output into a file that
> Hspice references
> for the
> physical description of the stackup and transmission
> lines???
> Then call this file as a lib that you can denote its
> length??
>
> thanks,
>
> jack ~
>
>
> ----- Original Message -----
> From: "Sudheer B S"
> To:
> Cc:
> Sent: Monday, October 27, 2003 7:11 AM
> Subject: [SI-LIST] Re: What are the differencs
> between W, T and U-element of
> a tranmission line model?
>
>
> > T : Lossless transmission line model , single
> signal only
> > Can be used for reflection analysis when lengths
> are less than
> > the critical length
> > U: Lossy Transmission lines allows upto few lines
> i am not sure of
> > this no
> > probably 4
> > W : Lossy Transmission line , Fast , accurate and
> robust than U
> > element and you can simulate
> > any no of signals
> >
> >
> >
> > Regards
> > SUDHEER
> >
> > lee yang wrote:
> >
> > >Hi all,
> > >Any explaination or material on these is much
> appreciated!
> > >-LY
> > >
> > >
> > >
> > >
> > >>From: "lee yang"
> > >>Reply-To: changly_80@xxxxxxxxxxx
> > >>To: si-list@xxxxxxxxxxxxx
> > >>Subject: [SI-LIST] What are the differencs
> between W, T and U-element of
> a
> > >>tranmission line model?
> > >>Date: Tue, 21 Oct 2003 11:05:41 +0000
> > >>
> > >>Hi,
> > >>
> > >>Could some one explains that what are the
> differences between W, T and
> > >>U-element of a transmission line model? How do i
> know which type of
> > >>transmission line model should I use in my
> simulation?
> > >>Thanks.
> > >>
> > >>Regards,
> > >>LY
> > >>
> >
>
>>_________________________________________________________________
> > >>Are you in love? Find a date on MSN Personals
> http://match.msn.com.my/
> > >>
> >
>
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> > >>
> > >>
> > >>
> > >
> >
>
>_________________________________________________________________
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>
> Message: 8
> Date: Mon, 27 Oct 2003 08:38:03 -0000
> From: Geoff Stokes
> Subject: Re: Sacrificial ground: Is it useful?
>
> Hi John,
>
> Some years ago, equipment in rack assemblies (sonar
> for example) used to
> have a "frame continuity" network. This network was
> isolated from the rest
> of the system except that it was joined at one point
> to the power supply
> ground. All the power returns of each electronic
> assembly where separately
> returned to a star-point ground terminal near the
> power supply unit. At
> that time, there was very little digital processing
> - it was slow - and high
> frequencies greater than 1MHz or so where not really
> of any concern. The
> idea was that a ground loop would be set up if the
> units were grounded at
> more than one point. Any such ground loop would be
> susceptible to inductive
> mains frequency coupling, and with lots of
> unscreened analog circuits in the
> system, this could easily be demonstrated if a unit
> was wrongly wired!
>
> I think maybe that kind of thinking has now changed
> and been replaced by a
> requirement for tight bonding between well-shielded
> units. Where necessary,
> isolated power supplies and differential signal
> interconnects or optical
> coupling are used for sensitive situations. Could it
> be that for lower
> frequencies, the Frame Continuity principle is still
> useful? However it
> seems to me that the decoupling caps you mention
> around the edges of the
> boards could possibly present a problem, coupling
> noise in at mid to low
> frequencies.
>
> Cheers
> Geoff
> > -----Original Message-----
> > From: John Coupland
> [mailto:coupswork@xxxxxxxxxxxxx]
> > Sent: 24 October 2003 17:59
> > To: si-list@xxxxxxxxxxxxx
> > Subject: [SI-LIST] Sacrificial ground: Is it
> useful?
> >
> >
> > Hi gurus,
> > We've traditionally used a "sacrificial ground" (a
>
> > trace around the edge of PCBs) which is connected
> to
> > chassis ground (when the board is installed). We
> also
> > distribute some caps (like 0.1uF) from this trace
> to
> > signal ground around the edge of the PCB.
>
> === message truncated ===
>
>
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