[SI-LIST] Re: Fwd: Re: About the chassis gnd and logic gnd
- From: John Barnes <jrbarnes@xxxxxxxxx>
- To: weirsp@xxxxxxxxxx, si-list@xxxxxxxxxxxxx
- Date: Thu, 25 Mar 2004 16:00:24 -0500
Steve,
I certainly agree with you about "follow the current" and "the universe
laughing at us". That is why, even when I am very confident about how
to do a certain part of a design, I still try to design in some "wiggle
room". Especially for areas where tiny changes can have huge impacts on
EMC/EMI/ESD--such as grounds and returns.
I run the input-output ground along the edge of the board, and except
for the ground ties it connects only to the shells of the connectors and
to the chassis/mounting-plate/shield mounting points. Thus it is part
of chassis ground, and does not connect directly to any signals or their
returns. At connectors, the input-output ground may be only as wide as
a signal trace, if that is all we can fit between the plated-through
holes or pads, and the edge of the board. Elsewhere I try to make the
input-output ground as wide as possible, up to 0.3-0.4", to completely
surround the connector-mounting points and the chassis/mounting-plate/
shield mounting points. Where there is room, I stitch all layers of the
input-output ground together with vias spaced roughly 0.5" apart. I
circle the hole at each chassis/mounting-plate/shield mounting point
with 8 vias to make sure that we have a low-impedance bond to each
layer.
I'm basically trying to make a Faraday Cage (jail cell) for any noise
trying to exit/enter that edge of the board, because the cables plugged
into those connectors can make some really effective/variable antennas.
I've seen moving cables around, as required by the FCC and CE Mark
radiated emissions tests, increase peak emissions by over 15dB. That is
a really nasty surprise to encounter--and have to fight--when we are
running the EMC/EMI/ESD approval tests on a client's product. To keep
from blowing their production and announcement schedule, we usually have
to add ferrite sleeves or ferrite toroids to some cables:
* Adding cost.
* Adding manufacturing steps.
* Detracting from the desired look of the product.
I'll bring logic ground under the connector pin fields, to make its own
drawbridge right at each connector.
I try to make the moat identical in all layers (perhaps widening it in
certain layers and in certain areas to meet other design requirements)
to ensure that there is no overlap between input-output ground and logic
ground. We should be able to hold the board up to the light, and see
clear through the moat everywhere except at the groundties. This way
any unwanted coupling between logic ground and the input-output ground
is edge-to-edge coupling, and as low as we can reasonably achieve.
John Barnes KS4GL, PE, NCE, ESDC Eng, SM IEEE
dBi Corporation
http://www.dbicorporation.com/
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