[SI-LIST] Fwd: RE: Re: Stack up for EMI reduction, plane resonance and u-s trip radiation etc etc
- From: steve weir <weirsp@xxxxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Wed, 11 Feb 2004 11:25:05 -0800
>Date: Wed, 11 Feb 2004 09:13:57 -0800
>To: "Grasso, Charles" <Charles.Grasso@xxxxxxxxxxxx>,
>"'Chris.Cheng@xxxxxxxxxxxx'" <Chris.Cheng@xxxxxxxxxxxx>, "'Istvan NOVAK'"
><istvan.novak@xxxxxxxxxxxxxxxx>
>From: steve weir <weirsp@xxxxxxxxxx>
>Subject: RE: [SI-LIST] Re: Stack up for EMI reduction, plane resonance and
>u-s trip radiation etc etc
>Cc: "'si-list@xxxxxxxxxxxxx'" <si-list@xxxxxxxxxxxxx>
>
>Charles, sure. First, because of the ESD issue, I also favor fences.
>
>The problem with fences comes back to plane resonance. Fences do a really
>great job of setting up big standing waves on the planes as they make near
>perfect transmission line reflectors. We can mitigate this somewhat by
>avoiding evenly spaced vias. The advocates of 20H who know their stuff,
>rightly point out that 20H sets up a controlled leak, thereby effectively
>dissipating energy that would otherwise resonate in the planes. 20H is
>controversial, because that "dissipation" is release of energy outside the
>board.
>
>As I said before, if the planes were sealed tight, this would not be an
>issue. But vias carry energy to the surface and features above the
>surface then become radiators. DET that Istvan has written about is one
>way to mitigate the problem. There are some other interesting ideas
>around, but at least at this time, I don't have the resources to pursue them.
>
>Steve.
>At 09:26 AM 2/11/2004 -0700, Grasso, Charles wrote:
>>Steve,
>>
>>I was thumbing through this thread and ran across an interesting statement
>>In one of your replies you said:
>>
>>"One of the hotter debates was the 20H rule. Amidst that debate came the
>>notion of ground fences on the outside of the board. While I like those
>>for ESD, they can do just as much harm as good for EMI."
>>
>>I am intrigued. I am (maybe naively ) in the "ground fences are good for
>>EMI" camp and was wondering if you would care to share your experiences on
>>this.
>>
>>Thanks again for your inputs on this reflector.
>>
>>Best Regards
>>Charles Grasso
>>Senior Compliance Engineer
>>Echostar Communications Corp.
>>Tel: 303-706-5467
>>Fax: 303-799-6222
>>Cell: 303-204-2974
>>Email: charles.grasso@xxxxxxxxxxxx;
>>Email Alternate: chasgrasso@xxxxxxxx
>>
>>
>>-----Original Message-----
>>From: steve weir [mailto:weirsp@xxxxxxxxxx]
>>Sent: Tuesday, February 10, 2004 3:13 PM
>>To: Chris.Cheng@xxxxxxxxxxxx; 'Istvan NOVAK'; Chris Cheng
>>Cc: si-list@xxxxxxxxxxxxx
>>Subject: [SI-LIST] Re: Stack up for EMI reduction, plane resonanceand u-s tr
>>ip radiation etc etc
>>
>>Chris,
>>
>>There is one point that I disagree on. Even though the package cuts off
>>with at least a -2 slope, there is quite of bit of high frequency energy
>>that still passes between the PWB and the IC. It is just grossly
>>inadequate to power the IC. But it has lots of potential to aggravate EMI
>>problems.
>>
>>No one believed Von Karmann when he theorized that wind was the source of
>>energy that sent the Tacoma Narrows bridge into destructive
>>resonance. But, we all have learned that Von Karmann was right.
>>
>>So now we have these resonant cavities in the form of PWB's with very low
>>damping coefficients. The IC's don't provide much damping, because as you
>>note the packages appear reactive, not resistive. As long as the energy
>>stays in the cavities and sloshes around at frequencies higher than the IC
>>cut-off(s), it probably isn't any big deal. But we have these: board
>>edges, vias, and components, all more than willing to provide radiation
>>paths for that energy.
>>
>>One of the hotter debates was the 20H rule. Amidst that debate came the
>>notion of ground fences on the outside of the board. While I like those
>>for ESD, they can do just as much harm as good for EMI.
>>
>>At 01:22 PM 2/10/2004 -0800, Chris Cheng wrote:
>> >Istvan,
>> >
>> >You got me on this one, I really need to figure out where can the
>>200-400MHz
>> >noise on PCB comes from ?
>> >Is it :
>> >a) Core noise, IC internal switch noise which propagate through the package
>> >power pins to the PCB
>> >Ans : Beaten to death, package is the choke point. EMI noise radiates from
>> >package not PCB
>>
>>Agreed
>>
>> >b) I/O switching noise, comes out from signal pins needs a return path the
>> >I/O power
>> >Ans : Managing the return path and reference plane not the decoupling caps.
>> >Yes, the plane CAPACITANCE not inductance provides the return path for the
>> >image current return through the opposite reference ground plane.
>>
>>This is where as system integrators, we end-up applying band-aids due to
>>poor IC design.
>>
>>Minor nit, I disagree with your characterization of plane
>>capacitance. Sure, without capacitance we would not have a coupling
>>mechanism, but at the frequencies of interest, the behavior over even
>>fairly short distances is of a transmission line, not a capacitor. This is
>>especially true with high K materials, and thin laminates.
>>
>>
>> >c) External terminators,
>> >Ans : The resistance of the terminator is the damping factor
>>
>>Agreed.
>>
>> >d) Noise from the supply
>> >Ans : 200-400MHz noise from a supply ??????
>>
>>It's all those TWT's that they like to use in quarter bricks!!! ( Just
>>kidding, everyone knows it is the Klystrons. )
>>
>> >e) External cable coupling
>> >Ans : ferrite beads and chokes
>>
>>Moating near I/O, shunt devices such as feed-through caps, or X2Ys are
>>pretty effective too, adequate bonding of the PWB to the chassis, etc.
>>
>>
>> >Aside from the above, none of which is related to fancy decoupling caps or
>> >thin core PCB, where else ?
>>
>>It is a matter of impedance. Either we get the decoupling capacitors
>>significantly closer to the package than lambda / 4, or we have stuck the
>>characteristic impedance of the planes between the IC and the caps. For
>>thick dielectric where that impedance can be an ohm or more, that is often
>>way too much. So, get close, or pay for fancy thin dielectrics.
>>
>>What fancy decoupling capacitors can do is make it easier to stay close to
>>the IC by using fewer devices. But we are still stuck drilling enough via
>>holes to attach those devices.
>>
>>Steve
>>
>> >Chris
>> >
>> >-----Original Message-----
>> >From: Istvan NOVAK [mailto:istvan.novak@xxxxxxxxxxxxxxxx]
>> >Sent: Monday, February 09, 2004 7:58 PM
>> >To: Chris Cheng; si-list@xxxxxxxxxxxxx
>> >Subject: Re: [SI-LIST] Stack up for EMI reduction, plane resonance and
>> >u-strip radiation etc etc
>> >
>> >
>> >Chris,
>> >
>> >Well, it depends on the nature of the devil; if you are
>> >concerned by noise getting from the PCB into the
>> >package through its power/ground pins, you are
>> >correct: the package resonance will filter out noise
>> >above the cutoff frequency. If you also want to
>> >reduce the noise on the PCB itself, the active devices
>> >will not reduce the noise for the same reason, because
>> >the package separates the silicon from the PCB.
>> >
>> >Regarding parallel plate capacitance: this was discussed
>> >several times on the list, and I dont want to repeat
>> >myself. But I think we are saying the same thing.
>> >When you say parallel plate capacitance, I say
>> >inductance. For a board of a few inches in size or
>> >bigger, the lowest series resonance of the board plates
>> >is 100MHz or lower. Above that frequency the impedance
>> >is mostly inductive. If you need a certain amount of parallel
>> >plate capacitance, we like it or not, it comes with a certain
>> >amount of inductance above the series resonance. If
>> >you need more parallel plate capacitance, you get it
>> >together with lower inductance.
>> >
>> >Regards,
>> >
>> >Istvan Novak
>> >SUN Microsystems
>> >
>> >----- Original Message -----
>> >From: "Chris Cheng" <Chris.Cheng@xxxxxxxxxxxx>
>> >To: "'Istvan NOVAK'" <istvan.novak@xxxxxxxxxxxxxxxx>; "Chris Cheng"
>> ><Chris.Cheng@xxxxxxxxxxxx>; <si-list@xxxxxxxxxxxxx>
>> >Sent: Monday, February 09, 2004 4:33 PM
>> >Subject: RE: [SI-LIST] Stack up for EMI reduction, plane resonance and
>> >u-strip radiation etc etc
>> >
>> >
>> > > Yes, once again the devil is in the details. It is one thing to stick an
>> > > impedance probe to measure the power plane impedance at a random
>>location
>> >on
>> > > the PCB. It is another thing to measure it on the real load side (i.e.
>> >after
>> > > the package). Have you done that ? Are you convince you can even see any
>> > > effect at 200-400MHz on PCB through the package ? Your colleague Larry
>>and
>> > > me don't think so.
>> > > As for I/O return current related noise on PCB, it is the parallel plate
>> > > capacitance that sandwich the stripline which is responsible for the
>> > > decoupling/return of the current (at least at 200-400MHz). Not the thin
>> >core
>> > > power/gnd pairs or fancy decoupling caps.
>> > >
>> > > -----Original Message-----
>> > > From: Istvan NOVAK [mailto:istvan.novak@xxxxxxxxxxxxxxxx]
>> > > Sent: Sunday, February 08, 2004 3:07 PM
>> > > To: Chris.Cheng@xxxxxxxxxxxx; si-list@xxxxxxxxxxxxx
>> > > Subject: Re: [SI-LIST] Stack up for EMI reduction, plane resonance and
>> > > u-strip radiation etc etc
>> > >
>> > >
>> > > Chris,
>> > >
>> > > I am not speaking for Zhangkun, but in many of the real boards I have
>> >looked
>> > > at by measurements and simulation, you can see the evidence of
>> >antiresonance
>> > > between the plane capacitance and inductances of capacitors. Chips (at
>> > > least on those boards I have looked at) did SHIFT the resonance
>>frequency
>> > > slightly, but did not make the peak go away. You are correct in saying
>> >that
>> > > if you sprinkle the board with capacitors, the resonance peak is
>> >suppressed.
>> > > But as you said in one of your recent postings, the devil is in the
>> >details:
>> > > sometimes you may need so MANY capacitors over the board area to
>> > > sufficiently suppress the resonance that it becomes a pain.
>> > >
>> > > Regards,
>> > >
>> > > Istvan Novak
>> > > SUN Microsystems
>> > >
>> > > ----- Original Message -----
>> > > From: "Chris Cheng" <Chris.Cheng@xxxxxxxxxxxx>
>> > > To: <si-list@xxxxxxxxxxxxx>
>> > > Sent: Monday, February 02, 2004 10:15 PM
>> > > Subject: [SI-LIST] Stack up for EMI reduction, plane resonance and
>>u-strip
>> > > radiation etc etc
>> > >
>> > >
>> > > > Finally......
>> > > >
>> > > > Zhangkun,
>> > > >
>> > > > I am also curious about these 200-400MHz plane resonace. If you
>>sprinkle
>> >a
>> > > > PCB with a wide range of caps with different values and at different
>> > > > location and with high power loading (ie real IC chips) at different
>> > > > location, do you still see pronounced peaks at 200-400MHz ? I have no
>> > > doubt
>> > > > a bare power/gnd plane pair can resonate at those frequencies, but
>>I've
>> > > > never seen that case once realistic caps and loading (IC chips) is
>> >placed
>> > > on
>> > > > the PCB. Are these simulation results or measurements based on a real
>> > > system
>> > > > with chips and caps ?
>> > > >
>> > >
>> > >
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>>
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