[SI-LIST] Fw: PCIe Gen 3 Compliance Pattern

  • From: Gregory R Edlund <gedlund@xxxxxxxxxx>
  • To: si-list@xxxxxxxxxxxxx
  • Date: Thu, 17 Apr 2014 14:24:50 -0500

Probably not too many of you are using a sampling scope to measure RJ, but
in case you are, the magic number is . . .(drum roll please). . . 4680.

The PCIe Gen 3 compliance pattern (short version) is made of 36 blocks of
130 bits each.  This works out to 4680 bits.

Thanks to everyone who pitched in.  Less than 24 hr. turn time.  Pretty
decent.

Greg Edlund
Senior Engineer
Signal Integrity and System Timing
IBM Systems & Technology Group
3605 Hwy. 52 N  Bldg 050-3
Rochester, MN 55901


----- Forwarded by Gregory R Edlund/Rochester/IBM on 04/17/2014 02:21 PM
-----

From:   Gregory R Edlund/Rochester/IBM
To:     si-list@xxxxxxxxxxxxx,
Date:   04/16/2014 04:09 PM
Subject:        PCIe Gen 3 Compliance Pattern


How Long is the Compliance Pattern for PCIe Gen 3?

The spec lists several different types of compliance patterns.  Some of
them look rather large.  I'm not sure which one my device is using, but my
sampling scope won't sync to it.  Anybody out there seen this?

Greg Edlund
Senior Engineer
Signal Integrity and System Timing
IBM Systems & Technology Group
3605 Hwy. 52 N  Bldg 050-3
Rochester, MN 55901

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