[SI-LIST] Frequency Domain Analysis of Jitter Amplification in Clock Channels

  • From: <colin_warwick@xxxxxxxxxxx>
  • To: <si-list@xxxxxxxxxxxxx>
  • Date: Wed, 24 Oct 2012 16:50:23 -0600

Hello si-listers,
We were honored to receive the Best Paper Award at this year's IEEE Conference 
on Electrical Performance of Electronic Packaging and Systems with our joint 
paper "Frequency Domain Analysis of Jitter Amplification in Clock Channels" 
co-authored by Agilent's very own Fangyi Rao and Sammy Hindi of Juniper 
Networks.

Our reprint is here: http://cp.literature.agilent.com/litweb/pdf/5991-1255EN.pdf

Enjoy!

-- Colin Warwick

Product manager for High Speed Digital, Agilent EEsof EDA

...feeds blog @ http://Signal-Integrity.TM.Agilent.com/feed/

...tweets @signalintegrity

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  • » [SI-LIST] Frequency Domain Analysis of Jitter Amplification in Clock Channels - colin_warwick