[SI-LIST] Free Seminar on Buried Capacitance applications during PCB West

From: "George Dudnikov" <George.Dudnikov@xxxxxxxxxxxxxxx>
To: <si-list@xxxxxxxxxxxxx>
Date: Thu, 22 Mar 2007 12:58:53 -0700

Free Seminar on Buried Capacitance applications during PCB West
 

For those attending PCB Design West next week , we are hosting a free
seminar on " Design Solutions  and Power Distribution Network ( PDN)
Performance Gains using thin dielectric Buried Capacitance layers". The
seminar will be held on Wednesday March 28th from 12PM-2PM at the Santa
Clara Hyatt next door to the  Convention Center.  Technical experts from
Dupont, Oak Mitsui, Merix and Sanmina-SCI will present technical data
and case study analysis on the  benefits achieved with thin dielectric
power and ground planes . Topics will include minimizing EMI resonances,
bypass capacitor removal and optimum placement, high frequency power
distribution  and cost/performance/reliability analysis. Presentations
will be followed by an open forum discussion and Q&A.  Bring your
applications and specific problems...the experts will be there to offer
solutions ....and most likely more than one opinion.  Seating is limited
so please RSVP quickly by emailing your name ,company and phone number
to embeddedpassives@xxxxxxxxxxxxxxx or by calling Karen at 408 964-4611.


 

George Dudnikov

Sr.VP CTO

PCB Division

Sanmina-SCI


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[SI-LIST] Free Seminar on Buried Capacitance applications during PCB West

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