[SI-LIST] Re: Flight Time
- From: "Coleman, Dave" <dave.coleman@xxxxxxxxx>
- To: "Grigoras, Adrian C" <adrian.c.grigoras@xxxxxxxxx>,"'whizplayer@xxxxxxxxx'" <whizplayer@xxxxxxxxx>,si_list <si-list@xxxxxxxxxxxxx>
- Date: Wed, 13 Nov 2002 17:27:11 -0800
Bob,
It's basically as Adrian says, you need to control the timing skew between
the clock (data strobe) and the data signals. If the clock is a different
type of buffer than the data signals, the length (and impedance) of the
clock may need to be different than the data signals. You will basically
want to center the strobe timing within the data min/max flight time, since
the data signal variation will most likely determine where you need to place
the clock timing.
Dave
-----Original Message-----
From: Grigoras, Adrian C [mailto:adrian.c.grigoras@xxxxxxxxx]
Sent: Wednesday, November 13, 2002 5:00 PM
To: 'whizplayer@xxxxxxxxx'; si_list
Subject: [SI-LIST] Re: Flight Time
Bob,
For a source synchronous bus you really have to calculate the flight time
SKEWS between the strobe and the data signals PAD TO PAD , i.e. including
the devices package lengths. The advantage of the source synch bus is if you
mantain a limited SKEW between the clock and the signals it will not matter
how LONG the bus is (except some other limitations). The skew should be
derived from your timing equations.
Hope this helps a little
Adrian
-----Original Message-----
From: Bob Patel [mailto:whizplayer@xxxxxxxxx]
Sent: Wednesday, November 13, 2002 2:57 PM
To: si_list
Subject: [SI-LIST] Flight Time
Hi! I had a question regarding Flight time. If I
calculate the maximum flight time to meet the setup
time and minimum flight time to meet hold time ans say
they are maxFlt time=4ns and min Flt time=1.28ns.
This is for a source synchronous bus, then what should
I keep the trace length for clock & parallel 15 bit
data bus.
I am saying I can keep the clock bus around the same
length and the length between the min & max flight
times.
Do you'l see any problems?
THanks
Bob
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