[SI-LIST] Re: Ferrite bead question
- From: "Curt McNamara" <CurtM@xxxxxxxxxxx>
- To: "Grasso, Charles" <Charles.Grasso@xxxxxxxxxxxx>, <hassan@xxxxxxxx>, <si-list@xxxxxxxxxxxxx>
- Date: Wed, 12 Apr 2006 11:27:40 -0500
Charles, I think these notes are "preaching to the choir" for you, but
some list members may benefit from the discussion.=20
I agree that filtered power is in general not practical with today's
multi-voltage chips. In some ways high frequency noise on a supply
voltage acts as "modulation" on top of other signals which can act as
"carrier". If we had filtered power than the only source for this high
frequency noise on outputs is internal to that chip.=20
So if we can't filter power then we do the next best thing: adjacent
power/ground plane pairs with capacitors stitching them together. We
often need power plane sections since there are I/O plus core voltages
(and a cost limit to layer count). We then need to stitch these power
sections together with caps across the plane splits to decrease the
return path for signal currents. IMHO there is rarely a reason for a
ground plane split (ground plane splits should be an exception to your
design rules).
Obviously any output signals which might contribute to emission problems
should have pads placed for termination. These pads can always be
populated with zero ohm jumpers, and the compromise in routing from a
pin to surface mount pads and back again is well worth the risk when
compared to re-spinning a design for emission problems. In many cases
routing a clock on a surface layer adjacent to ground is the best
emissions strategy as well.=20
The PCB placement (with all these caps included!) is first priority, as
well as routing clocks and other critical signals first to ensure they
have a continuous return path. If you wait for a layout review until the
board is routed, there is often no practical way to fix problems.=20
Curt
Curt McNamara. P.E.=20
Senior Electrical Engineer=20
Logic Product Development=20
411 Washington Ave. N Suite 101=20
Minneapolis, MN 55401=20
Tel 612-436-5178=20
Fax 612-672-0443=20
curtm@xxxxxxxxxxx=20
www.logicpd.com=20
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-----Original Message-----
From: Grasso, Charles [mailto:Charles.Grasso@xxxxxxxxxxxx]=20
Sent: Wednesday, April 12, 2006 10:34 AM
To: Curt McNamara; hassan@xxxxxxxx; si-list@xxxxxxxxxxxxx
Subject: RE: [SI-LIST] Re: Ferrite bead question
Curt - I too used to use the filtered Vcc pin trick. However when
presented with a BGA with multiple voltages and pins I abandoned the
idea as unwieldy. After all - there are many BGAs that drive a clock
out and therefore logically should have filtered Vcc pins. Any thoughts
on how to deal with this issue?
Best Regards
Charles Grasso
Senior Compliance Engineer
Echostar Communications Corp.
Tel: 303-706-5467
Fax: 303-799-6222
Cell: 303-204-2974
Pager/Short Message: 3032042974@xxxxxxxx
Email: charles.grasso@xxxxxxxxxxxx;
Email Alternate: chasgrasso@xxxxxxxx
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of Curt McNamara
Sent: Tuesday, April 11, 2006 6:45 PM
To: hassan@xxxxxxxx; si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Ferrite bead question
Lots of excellent points in this discussion! A few obsevations "from the
trenches".
=20
Ferrites are used primarily to suppress EMI, mostly at frequencies above
100MHz. However, there is another kind of ferrite material effective at
low switcher frequencies (50-150KHz). Check your datasheet!
=20
I used to think (as some have stated) that ferrites were the sign of a
poor design. However, years of producing Class B telecom designs on a
monthly basis showed me that in some cases they were effective for EMI
control. So they became part of the toolbox, and we would often add pads
allowing us to connect two nets together with a zero ohm jumper,
inductor, resistor, or ferrite. Then when it was approaching midnight at
the lab and you needed a result for the morning you had some options.
BTW I still consider excessive gasketing inside PC cases as a sign of
poor design practice ....
=20
For filtering a supply voltage (for example a PLL pin) I typically use
an inductor/resistor and dedicated cap(s), not ferrites. This is also
what I have seen in many app notes.=20
=20
Mostly I agree with Lee that people put a ferrite on as some guard
against the dark forces :-) which they do not understand, and that in
most cases they cause far more problems than they eliminate. I can't
count the times I have recommended removing the ferrite and starting
from that point when debugging some unusual problem ...
=20
Curt
=20
Curt McNamara. P.E.=20
Senior Electrical Engineer=20
Logic Product Development=20
411 Washington Ave. N Suite 101=20
Minneapolis, MN 55401=20
Tel 612-436-5178=20
Fax 612-672-0443=20
curtm@xxxxxxxxxxx=20
www.logicpd.com=20
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________________________________
From: si-list-bounce@xxxxxxxxxxxxx on behalf of Hassan O. Ali
Sent: Tue 4/11/2006 1:03 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Ferrite bead question
I always thought that ferrite beads were primarily used to surpress
noise FROM (rather than INTO) high-speed and clock-like devices. I
thought ferrite-beads were used as a measure against power-supply
corruption and also as an EMI prevention. I thought ferrite- beads were
harmless at lower (switching) frequencies over which voltage regulator
modules are supposed to operate as long as their impedances were low
enough not to cause excessive voltage ripples. If the above is correct,
is it then fair to blame semiconductor folks for something that board
designers have to make a decision on? Please someone tell me if this
understanding is wrong.
Best regards.
Hassan.
On Apr 11, <art_porter@xxxxxxxxxxx> wrote:
>
> Back in the good old days when I was actually designing stuff instead
of =3D
> trying to sell stuff, use of beads was considered a serious sign of =
=3D=20
> weakness.=3D20 But like anything else, if it works, fine, but you need =
> to understand
=3D
> why it works. If you understand why a bead works, often that will lead
=3D
> to an insight as to how to fix the problem without using a bead.=3D20
>
> Art Porter
> Agilent =3D20
>
> -----Original Message-----
> From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx] =3D
> On Behalf Of Joel Brown
> Sent: Tuesday, April 11, 2006 10:46 AM
> To: leeritchey@xxxxxxxxxxxxx
> Cc: Zhangkun; si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] Re: Ferrite bead question
>
> Lee,
> I can't say that I disagree with any of the points you made. The=20
> problem is these days semiconductor companies have changed
their=3D20
> support model.
> Most have done way with FAEs and factory applications engineers
unless=3D20
> maybe if you are a large customer.
> More often than not support is provided by email and the responses
are=3D20
> slow in coming and usually don't adequately address the question. Now=20
> when I encounter an application note with a ferrite bead=3D20=20
> recommended, the chances of the IC manufacturer providing
information=3D20
> that meets all your criteria is slim and none. The suggestion that
the=3D20
> IC manufacturers provided a current spectrum is a good one, but it
seems =3D
>
> they are more preoccupied with the inner workings of their chips
than=3D20
> supplying information about how their parts effect the power system.
My=3D20
> inclination at this point is to include a footprint for a ferrite
where=3D20
> I think it might help, then make measurements with various ferrite
beads =3D
>
> and a 0 ohm resistor and see which part results in lowest noise=3D20=20
> measurements. The only problem is that a 0 ohm resistor would have
more=3D20
> inductance than vias connecting the bypass caps directly to the
power=3D20
> plane. This has definitely been a learning experience, thanks to
all=3D20
> that posted responses.
>
> Joel
>
>
> Lee Ritchey wrote:
> > Joel,
> >
> >
> > As others have observed, when the solution using a ferrite bead has
=3D
> been
> > engineered to satisfy the following set of conditions it is
warranted =3D
> and
> > helpful.
> >
> > 1. There is a problem that needs fixing.
> > 2. The proposed solution fixes the problem.
> > 3. The proposed solution does not cause new problems.
> > 4. The proposed solution is the best solution to the problem.
> >
> > When you apply this set of tests to the usual applications note=20
> > recommendation, it often fails test number 1. The proponent has not
> > acertained that there is a problem and what it actually looks like.
> >
> > I put this question to the students in my classes at UC Berkeley, =
=3D
> nearly
> > always practicing engineers. Can you show me an applications note =
=3D
> with
> > analysis supporting the use of ferrite beads? So far, there have
been =3D
> no
> > such examples. I keep hoping, but know that most applications notes
=3D
> are
> > not prepared that way. Soon as I find one, I'll report it in this =
=3D
> forum
> > and show it in my classes- and give its author high praise for doing
=3D
> good
> > engineering.
> >
> > More commonly, they are justified because "we have always done it
=3D
> this
> > way." Further, there has usually not been any exhaustive testing to
=3D
> insure
> > the solution is valid. That is in no way good engineering. =3D20
> >
> > I'll accept a recommendation that is accompanied by supporting =3D
> engineering
> > analysis. Less, seems to me to be guessing and that's a good way to
=3D
> get in
> > trouble with modern e lectronic components.
> >
> >
> >
> >
> > =3D20
> >> [Original Message]
> >> From: Joel Brown <joel@xxxxxxxxxx>
> >> To: <leeritchey@xxxxxxxxxxxxx>
> >> Cc: Zhangkun <zhang_kun@xxxxxxxxxx>; <si-list@xxxxxxxxxxxxx>
> >> Date: 4/10/2006 10:17:06 AM
> >> Subject: Re: [SI-LIST] Re: Ferrite bead question
> >>
> >> Lee,
> >>
> >> After reading the responses and giving some more thought to this,
I=3D20
> >> agree that in some situations the use of ferrite beads can be =3D
> detrimental.
> >> In the design I am currently working on, the ferrite beads are
used=3D20
> >> mostly on low speed I/O signals and DC power to ICs that are not =
=3D
> running=3D20
> >> at very high speeds.
> >> The highest speed part is a 100 MHz PCI Express clock buffer, and
the =3D
>
> >> manufacturer does recommend to use a ferrite bead.
> >> While I agree your statements have some merit, I find it
problematic=3D20
> >> that you seem to be saying ferrite beads only work by luck.=20
> >> Certainly there must be situations in which they can predictably be
=3D
> used=3D20
> >> to reduce noise.
> >>
> >> Regards - Joel
> >>
> >>
> >>
> >> Lee Ritchey wrote:
> >> =3D20
> >>> Joel,
> >>>
> >>> I agree with all the respondents who have cautioned you on the use
=3D
> of
> >>> ferrite beads in the power leads of devices. In all of the cases,
I
> >>> =3D20
> > have
> > =3D20
> >>> investigated, ferrite beads have been used to treat a symptom
rather
> >>> =3D20
> > than
> > =3D20
> >>> the problem. The problem being that the power delivery system had
=3D
> too
> >>> =3D20
> > much
> > =3D20
> >>> noinse or ripple on it.
> >>>
> >>> Lately, I have seen many cases where placing a ferrite bead in the
=3D
> power
> >>> lead of a device, very often the power lead of very high speed =3D
> serdes,
> >>> =3D20
> > has
> > =3D20
> >>> made the part perform poorly or below spec.
> >>>
> >>> Yes, thousands of applications notes insist that ferrite beads be
> >>> =3D20
> > placed in
> > =3D20
> >>> the power leads and the applications engineers will demad you use
=3D
> them
> >>> =3D20
> > or
> > =3D20
> >>> they won't guarantee the circuit will work properly. The other
side =3D
> of
> >>> that same coin is that when you ask if they will guarantee that
the
> >>> =3D20
> > circuit
> > =3D20
> >>> will work properly if you follow the applications note exactly,
the
> >>> =3D20
> > answer
> > =3D20
> >>> is still no! The reason is that there has been no analysis to
prove
> >>> =3D20
> > that
> > =3D20
> >>> the use of a ferrite bead is a good idea.=3D20
> >>>
> >>> I have measured wavforms of a 3.12 GB/S serial link where the eye
=3D
> just
> >>> barely makes the minimum signal amplitude with the ferrite bead in
=3D
> place
> >>> and has large amounts of margin when the ferrite bead is shorted =
=3D
> out.=3D20
> >>> This, even with the manufacturer's recommended capacitors
attached.=3D20
> >>> =3D20
> > This
> > =3D20
> >>> data was taken from a demo board supplied by the manufacturer who
=3D
> was
> >>> =3D20
> > not
> > =3D20
> >>> aware of the degradation caused by the ferrite bead.
> >>>
> >>> The right solution is to design a power delivery system with power
> >>> =3D20
> > supply
> > =3D20
> >>> noise within the limits of the circuits being supplied and this is
=3D
> not
> >>> =3D20
> > very
> > =3D20
> >>> difficult to do.
> >>>
> >>> I have done the SI rule generation for three terabit routers with
> >>> thousands of 3.125 GB/S and 4.8 GB/S serial links in them and used
=3D
> no
> >>> ferrite beads in them any where and they worked to specification
the
> >>> =3D20
> > first
> > =3D20
> >>> time wit hproper margins. So maybe people who want you to use =3D
> ferrite
> >>> beads should be challenged with why they want you to add these =
=3D
> parts.
> >>>
> >>> My fellow SI engineers call ferrite beads "voodoo" beads and "get
=3D
> lucky"
> >>> beads for good reason.
> >>>
> >>> This is not likely to make the ferrite bead salesmen happy, I'm =
=3D
> sure.
> >>>
> >>>
> >>> =3D20
> >>> =3D20
> >>>> [Original Message]
> >>>> From: Zhangkun <zhang_kun@xxxxxxxxxx>
> >>>> To: <joel@xxxxxxxxxx>; <si-list@xxxxxxxxxxxxx>
> >>>> Date: 4/10/2006 1:14:21 PM
> >>>> Subject: [SI-LIST] Re: Ferrite bead question
> >>>>
> >>>> Dear Joel
> >>>>
> >>>> As to my experience, it is not enough to select bead based on the
=3D
> P/N.
> >>>> =3D20
> >>>> =3D20
> >>> The decoupling circuit should be considered very carefully. =3D20
> >>> =3D20
> >>>> In several cases, we use beads and the noise become larger. The
> >>>> =3D20
> > following
> > =3D20
> >>>> =3D20
> >>>> =3D20
> >>> element should be considered:
> >>> =3D20
> >>> =3D20
> >>>> 1.The resonance between bead and capacitor.
> >>>> 2.The frequency span of the noise source.
> >>>>
> >>>> A simulation is suggested. It is very simple.
> >>>>
> >>>> Hope this is helpful
> >>>>
> >>>> Best Regards
> >>>>
> >>>> Zhangkun
> >>>> 2006.4.10
> >>>> ----- Original Message -----=3D20
> >>>> From: "Joel Brown" <joel@xxxxxxxxxx>
> >>>> To: <si-list@xxxxxxxxxxxxx>
> >>>> Sent: Saturday, April 08, 2006 2:33 AM
> >>>> Subject: [SI-LIST] Ferrite bead question
> >>>>
> >>>>
> >>>> =3D20
> >>>> =3D20
> >>>>> I often see recommendations in application notes for ferrite
beads =3D
> on
> >>>>> =3D20
> >>>>> =3D20
> >>> DC=3D20
> >>> =3D20
> >>> =3D20
> >>>>> power lines. Sometimes a particular P/N is specified and
sometimes
> >>>>> =3D20
> > just=3D20
> > =3D20
> >>>>> an impedance is given.
> >>>>> Wouldn't I want to choose a ferrite bead that has the highest
> >>>>> =3D20
> > impedance=3D20
> > =3D20
> >>>>> possible at the frequencies of interest, and that the current =
=3D
> rating
> >>>>> =3D20
> >>>>> =3D20
> >>> and=3D20
> >>> =3D20
> >>> =3D20
> >>>>> DC resistance are appropriate? Would the frequencies of interest
=3D
> be
> >>>>> =3D20
> > the=3D20
> > =3D20
> >>>>> fundamental switching frequency of the part and possibly the 3rd
=3D
> and
> >>>>> =3D20
> >>>>> =3D20
> >>> 5th=3D20
> >>> =3D20
> >>> =3D20
> >>>>> harmonics?
> >>>>> Thanks - Joel
> >>>>>
> >>>>>
> >>>>>
> >>>>> -- Binary/unsupported file stripped by Ecartis --
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> >>>>> -- File: joel.vcf
> >>>>>
> >>>>>
> >>>>>
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href=3D'http://www.si-list.org'>http://www.si-list.org</a>
>
> List archives are viewable at: =20
> <a href=3D'//www.freelists.org/archives/si-
list'>//www.freelists.org/archives/si-list</a>
> or at our remote archives:
> <a href=3D'http://groups.yahoo.com/group/si-
list/messages'>http://groups.yahoo.com/group/si-list/messages</a>
> Old (prior to June 6, 2001) list archives are viewable at:
> <a
href=3D'http://www.qsl.net/wb6tpu'>http://www.qsl.net/wb6tpu</a>
> =20
>
>
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To unsubscribe from si-list:
si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field
or to administer your membership from a web page, go to:
//www.freelists.org/webpage/si-list
For help:
si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field
List FAQ wiki page is located at:
http://si-list.org/wiki/wiki.pl?Si-List_FAQ
List technical documents are available at:
http://www.si-list.org
List archives are viewable at: =20
//www.freelists.org/archives/si-list
or at our remote archives:
http://groups.yahoo.com/group/si-list/messages
Old (prior to June 6, 2001) list archives are viewable at:
http://www.qsl.net/wb6tpu
=20
------------------------------------------------------------------
To unsubscribe from si-list:
si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field
or to administer your membership from a web page, go to:
//www.freelists.org/webpage/si-list
For help:
si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field
List FAQ wiki page is located at:
http://si-list.org/wiki/wiki.pl?Si-List_FAQ
List technical documents are available at:
http://www.si-list.org
List archives are viewable at: =20
//www.freelists.org/archives/si-list
or at our remote archives:
http://groups.yahoo.com/group/si-list/messages
Old (prior to June 6, 2001) list archives are viewable at:
http://www.qsl.net/wb6tpu
=20
------------------------------------------------------------------
To unsubscribe from si-list:
si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field
or to administer your membership from a web page, go to:
//www.freelists.org/webpage/si-list
For help:
si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field
List FAQ wiki page is located at:
http://si-list.org/wiki/wiki.pl?Si-List_FAQ
List technical documents are available at:
http://www.si-list.org
List archives are viewable at:
//www.freelists.org/archives/si-list
or at our remote archives:
http://groups.yahoo.com/group/si-list/messages
Old (prior to June 6, 2001) list archives are viewable at:
http://www.qsl.net/wb6tpu
Other related posts:
