[SI-LIST] Re: Ferrite bead question
- From: "Lee Ritchey" <leeritchey@xxxxxxxxxxxxx>
- To: "Scott McMorrow" <scott@xxxxxxxxxxxxx>, joel@xxxxxxxxxx
- Date: Tue, 11 Apr 2006 08:27:25 -0700
Scott,
I couldn't have said it better. Thanks for the clarification.
----- Original Message -----
From: Scott McMorrow
To: joel@xxxxxxxxxx
Cc: leeritchey@xxxxxxxxxxxxx; Zhangkun; si-list@xxxxxxxxxxxxx
Sent: 4/10/2006 10:49:30 AM
Subject: Re: [SI-LIST] Re: Ferrite bead question
Joel,
I think Lee is being a little bit black and white, but not without good
reason.. Whether or not ferrites "work" in a power filtering design is a
matter of whether the engineering was performed. What I think Lee often sees
are systems where no engineering has gone into the design of ferrite, and they
have been thrown into a circuit without thought. Often because "that's the way
we've always done it" or "that's that way the competitors do it" or because
"that's the only ferrite we have in our parts system." The inductance of a
ferrite can interact with the power system and capacitors to form a pretty
nasty resonance. This resonance often sits in the low frequency region, around
the VRM output transition region, and has a strong tendency to cause peaking in
the 100 kHz to 1 MHz range. This peaking can cause noise modulation of the
Serdes, which Lee has often observed. If the PCB power delivery network has a
lower impedance in the frequencies that affect the Serdes, than t
hey ferrite filter does, then shorting the ferrite will help. But if a
ferrite filter network is correctly designed, it is well matched and does not
cause peaking.
Whether or not noise injected into a Serdes affects it's output is a function
of the internal PLL/DLL design. This is hardly ever specified, but can be
measured.
Scott
Scott McMorrow
Teraspeed Consulting Group LLC
121 North River Drive
Narragansett, RI 02882
(401) 284-1827 Business
(401) 284-1840 Fax
http://www.teraspeed.com
Teraspeed® is the registered service mark of
Teraspeed Consulting Group LLC
Joel Brown wrote:
Lee,
After reading the responses and giving some more thought to this, I
agree that in some situations the use of ferrite beads can be detrimental..
In the design I am currently working on, the ferrite beads are used
mostly on low speed I/O signals and DC power to ICs that are not running
at very high speeds.
The highest speed part is a 100 MHz PCI Express clock buffer, and the
manufacturer does recommend to use a ferrite bead.
While I agree your statements have some merit, I find it problematic
that you seem to be saying ferrite beads only work by luck.
Certainly there must be situations in which they can predictably be used
to reduce noise.
Regards - Joel
Lee Ritchey wrote:
Joel,
I agree with all the respondents who have cautioned you on the use of
ferrite beads in the power leads of devices. In all of the cases, I have
investigated, ferrite beads have been used to treat a symptom rather than
the problem. The problem being that the power delivery system had too much
noinse or ripple on it.
Lately, I have seen many cases where placing a ferrite bead in the power
lead of a device, very often the power lead of very high speed serdes, has
made the part perform poorly or below spec.
Yes, thousands of applications notes insist that ferrite beads be placed in
the power leads and the applications engineers will demad you use them or
they won't guarantee the circuit will work properly. The other side of
that same coin is that when you ask if they will guarantee that the circuit
will work properly if you follow the applications note exactly, the answer
is still no! The reason is that there has been no analysis to prove that
the use of a ferrite bead is a good idea.
I have measured wavforms of a 3.12 GB/S serial link where the eye just
barely makes the minimum signal amplitude with the ferrite bead in place
and has large amounts of margin when the ferrite bead is shorted out.
This, even with the manufacturer's recommended capacitors attached. This
data was taken from a demo board supplied by the manufacturer who was not
aware of the degradation caused by the ferrite bead.
The right solution is to design a power delivery system with power supply
noise within the limits of the circuits being supplied and this is not very
difficult to do.
I have done the SI rule generation for three terabit routers with
thousands of 3.125 GB/S and 4.8 GB/S serial links in them and used no
ferrite beads in them any where and they worked to specification the first
time wit hproper margins. So maybe people who want you to use ferrite
beads should be challenged with why they want you to add these parts.
My fellow SI engineers call ferrite beads "voodoo" beads and "get lucky"
beads for good reason.
This is not likely to make the ferrite bead salesmen happy, I'm sure.
[Original Message]
From: Zhangkun <zhang_kun@xxxxxxxxxx>
To: <joel@xxxxxxxxxx>; <si-list@xxxxxxxxxxxxx>
Date: 4/10/2006 1:14:21 PM
Subject: [SI-LIST] Re: Ferrite bead question
Dear Joel
As to my experience, it is not enough to select bead based on the P/N.
The decoupling circuit should be considered very carefully.
In several cases, we use beads and the noise become larger. The following
element should be considered:
1.The resonance between bead and capacitor.
2.The frequency span of the noise source.
A simulation is suggested. It is very simple.
Hope this is helpful
Best Regards
Zhangkun
2006.4.10
----- Original Message -----
From: "Joel Brown" <joel@xxxxxxxxxx>
To: <si-list@xxxxxxxxxxxxx>
Sent: Saturday, April 08, 2006 2:33 AM
Subject: [SI-LIST] Ferrite bead question
I often see recommendations in application notes for ferrite beads on
DC
power lines. Sometimes a particular P/N is specified and sometimes just
an impedance is given.
Wouldn't I want to choose a ferrite bead that has the highest impedance
possible at the frequencies of interest, and that the current rating
and
DC resistance are appropriate? Would the frequencies of interest be the
fundamental switching frequency of the part and possibly the 3rd and
5th
harmonics?
Thanks - Joel
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