[SI-LIST] Re: Fan-out in TTL and CMOS
- From: "Lee Ritchey" <leeritchey@xxxxxxxxxxxxx>
- To: "Tom Dagostino" <tom@xxxxxxxxxxxxx>, kfrobinson@xxxxxxxxxx, venubabu@xxxxxxxxx, si-list@xxxxxxxxxxxxx
- Date: Thu, 10 Feb 2005 11:02:47 -0800
Well,
This has been an interesting thread. Sorry to be slow with this. Been on
the road. As many have pointed out, there are still ECL type interfaces
being included on large parts. I stand corrected.
Perhaps it would have been better to say that as a main stream logic family
it is dead. Sure, there are CMOS equivalents of both TTL and ECL.
How's this. ECL isn't dead. The body is prone and if you put a
stethoscope on the carotid artery, you can still detect a pulse!
Lee W. Ritchey
Speeding Edge
P. O. Box 2194
Glen Ellen, CA 95442
Phone- 707-568-3983
FAX- 707-568-3504
I just used the energy it took to be angry to write some blues.
Count Basie
> [Original Message]
> From: Tom Dagostino <tom@xxxxxxxxxxxxx>
> To: <leeritchey@xxxxxxxxxxxxx>; <kfrobinson@xxxxxxxxxx>;
<venubabu@xxxxxxxxx>; <si-list@xxxxxxxxxxxxx>
> Date: 2/4/2005 6:16:45 PM
> Subject: [SI-LIST] Re: Fan-out in TTL and CMOS
>
> Lee
>
> In the past year or so I've done models for companies like ON, Atmel,
> Micrel, Zarlink, Maxim, etc. that all used ECL/PECL interfaces. Many of
> these models were for newly introduced partnumbers. These parts are
getting
> designed into new designs. Some of these components even use CMOS
> technology to make outputs that interface with ECL/PECL levels.
>
> Tom Dagostino
> Teraspeed Labs
> 13610 SW Harness Lane
> Beaverton, OR 97008
> 503-430-1065
> http://www.teraspeed.com
> tom@xxxxxxxxxxxxx
>
> Teraspeed Consulting Group LLC
> 121 North River Drive
> Narragansett, RI 02882
> 401-284-1827
>
> Teraspeed is the registered service mark of
> Teraspeed Consulting Group LLC
>
> -----Original Message-----
> From: Lee Ritchey [mailto:leeritchey@xxxxxxxxxxxxx]
> Sent: Friday, February 04, 2005 5:12 PM
> To: Tom Dagostino; kfrobinson@xxxxxxxxxx; venubabu@xxxxxxxxx;
> si-list@xxxxxxxxxxxxx
> Subject: RE: [SI-LIST] Re: Fan-out in TTL and CMOS
>
>
> Tom,
>
> I know that PECL is still around on some communications ICs. From what I
> can tell, these are more legacy designs than anything else. What I am
> seeing is a rapid replacement of PECL with one of the several types of
CMOS
> differential signalling. As to a stand alone technology, ECL has pretty
> much gone away and that was what my comment "ECL is dead" meant to imply.
> It's been three or four years since I've seen a part with PECL on it.
>
> Same applies for clock distribution. Various forms of LVDS are taking
over
> and in most cases already have. Makes it easier to design and IC if
> everything is CMOS.
>
> Used to be if we needed a very high speed clock path ECL was the only
> choice. But as can be seen by the speeds of some of the CMOS differential
> signalling circuits, lots of them running at 4.8 GB/S and higher, it
> doesn't take ECL anymore.
>
> This one sure got a rise ouf of people on a Friday afternoon! Thought we
> all had sense enough to go outside now that the sun is shining.
>
> Lee W. Ritchey
> Speeding Edge
> P. O. Box 2194
> Glen Ellen, CA 95442
> Phone- 707-568-3983
> FAX- 707-568-3504
>
> I just used the energy it took to be angry to write some blues.
> Count Basie
>
>
> > [Original Message]
> > From: Tom Dagostino <tom@xxxxxxxxxxxxx>
> > To: <leeritchey@xxxxxxxxxxxxx>; <kfrobinson@xxxxxxxxxx>;
> <venubabu@xxxxxxxxx>; <si-list@xxxxxxxxxxxxx>
> > Date: 2/4/2005 4:30:04 PM
> > Subject: RE: [SI-LIST] Re: Fan-out in TTL and CMOS
> >
> > Lee
> >
> > A lot of the models I've done recently have had a port or two of ECL
> (PECL).
> > They tend to be used in communications applications, military or clock
> > distribution. ECL may have high DC power consumption but as you go up
in
> > frequency the power consumption of a CMOS gate can also be relatively
> high.
> >
> > Tom Dagostino
> > Teraspeed Labs
> > 13610 SW Harness Lane
> > Beaverton, OR 97008
> > 503-430-1065
> > http://www.teraspeed.com
> > tom@xxxxxxxxxxxxx
> >
> > Teraspeed Consulting Group LLC
> > 121 North River Drive
> > Narragansett, RI 02882
> > 401-284-1827
> >
> > Teraspeed is the registered service mark of
> > Teraspeed Consulting Group LLC
> >
> > -----Original Message-----
> > From: si-list-bounce@xxxxxxxxxxxxx
> > [mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of Lee Ritchey
> > Sent: Friday, February 04, 2005 4:20 PM
> > To: kfrobinson@xxxxxxxxxx; venubabu@xxxxxxxxx; si-list@xxxxxxxxxxxxx
> > Subject: [SI-LIST] Re: Fan-out in TTL and CMOS
> >
> >
> > Ken,
> >
> > Guess I overshot! There are still a few places that ECL is used and one
> of
> > them is what you mentioned. Still, as a logic family for other
> > applications, it's been pretty well displaced by CMOS. For most of us
> > designing high speed computers and such it may as well be dead. IF for
no
> > other reason than power consumption.
> >
> > Lee W. Ritchey
> > Speeding Edge
> > P. O. Box 2194
> > Glen Ellen, CA 95442
> > Phone- 707-568-3983
> > FAX- 707-568-3504
> >
> > I just used the energy it took to be angry to write some blues.
> > Count Basie
> >
> >
> > > [Original Message]
> > > From: <kfrobinson@xxxxxxxxxx>
> > > To: <leeritchey@xxxxxxxxxxxxx>; <venubabu@xxxxxxxxx>;
> > <si-list@xxxxxxxxxxxxx>
> > > Date: 2/4/2005 3:24:24 PM
> > > Subject: [SI-LIST] Re: Fan-out in TTL and CMOS
> > >
> > > Lee,
> > > I certainly hope you don't take yourself too seriously. ECL is dead?
I
> > > guess all the people around the world whom design ATE equipment should
> > > just find another line of work. Maybe write books?
> > >
> > > Ken Robinson
> > > Micron Technology=20
> > >
> > > -----Original Message-----
> > > From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx]
> > > On Behalf Of Lee Ritchey
> > > Sent: Friday, February 04, 2005 10:10 AM
> > > To: Ummalaneni, Venu Babu (Venu); si-list@xxxxxxxxxxxxx
> > > Subject: [SI-LIST] Re: Fan-out in TTL and CMOS
> > >
> > > Venu,
> > >
> > > Fanout is a DC loading concept for TTL. It has no meaning when
talking
> > > about high speed circuits. Driver output impedance and rise time are
> > > what are important for COMS. CMOS inputs are purely capacitive, so
they
> > > represent no DC load. TTL is dead as a technology, so worrying about
> > > fanout is behind us. By the way, ECL is dead as well.
> > >
> > > Lee W. Ritchey
> > > Speeding Edge
> > > P. O. Box 2194
> > > Glen Ellen, CA 95442
> > > Phone- 707-568-3983
> > > FAX- 707-568-3504
> > >
> > > I just used the energy it took to be angry to write some blues.
> > > Count Basie
> > >
> > >
> > > > [Original Message]
> > > > From: Ummalaneni, Venu Babu (Venu) <venubabu@xxxxxxxxx>
> > > > To: <si-list@xxxxxxxxxxxxx>
> > > > Date: 2/3/2005 10:11:18 PM
> > > > Subject: [SI-LIST] Fan-out in TTL and CMOS
> > > >
> > > > Hi Experts,
> > > >
> > > > I know that fan-out in TTL circuits is decided by noise margin,
> i.e.;=20
> > > > if we want more fan-out noise margin has to diminishes.
> > > >
> > > > In case of CMOS which factor decides the fan-out. As there is no=20
> > > > static current drawn by the load, I hope time delay will decide
the=20
> > > > fan-out in case of CMOS.
> > > >
> > > > Please clear me if I am wrong. Any inputs are welcome.
> > > >
> > > >
> > > > Thanks in advance
> > > >
> > > > Best Regards,
> > > > Venu.
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