[SI-LIST] FW: Re: subscribe: drive ability

  • From: "Edi Fraiman" <Edi.Fraiman@xxxxxxxxxxxxx>
  • To: <si-list@xxxxxxxxxxxxx>
  • Date: Wed, 26 Jan 2005 12:31:16 +0200

Hi,

Not only output impedance of the driver is what really matters. Another
important factor is Z0 >> RO (ZO is line characteristic impedance that
driver should drive and RO is output impedance of driver).

When new receivers are connected to the line, the unit capacitance
increases and therefore the characteristic impedance Z0 decreases.


Edi

-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of Dennis Han
Sent: Tuesday, January 25, 2005 6:20 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: subscribe: drive ability

Get the SPICE or IBIS model and simulate it.  Output impedance of the
driver=20
is what really matters.  If you take the SPICE model and determine the=20
output impedance you will find it has little to do with the drive
current=20
rating, especially comparing supplier to supplier and technology to=20
technology.  The drive current rating is a DC parameter that finds when
Vohl=20
and Volh are reached.  I would not use it unless you are designing a DC=20
circuit.  You can also get a rough idea of what the output impedance is
by=20
looking at the I-V curve in the IBIS model file.

Dennis


----- Original Message -----=20
From: "Zhao Yu" <tianfeiyu@xxxxxxxx>
To: <si-list@xxxxxxxxxxxxx>
Sent: Tuesday, January 25, 2005 9:51 AM
Subject: [SI-LIST] subscribe: drive ability


> dear sir,
>      I'm confused with the drive=3D ability calculation . When =
designed
>  the circuit, we have to con=3D sider the drive strength of the drive
> pin. It is said that the maximum =3D output current of drive pin =
should
> be more than the sum of all input pi=3D n driven.   But i don't know
> which current i should use to ca=3D lculate. Maybe we can divide all =
the
> time into two phase: the transient=3D phase and the stable phase. In =
the
> transient phase, the switches are t=3D o be closed and all of the
> parasitical capacitors , include output pin =3D parasitical capacitor,
> transmission line ,input pin parasitical capacit=3D or and so on, are
> charged. During this time, the value of current is la=3D rge, but the
> persistence time is short.  In the stable phase, the =3D current in =
the
> circuit is only the leakage current of CMOS gate and its=3D value is
> small ,but it lasts a long time.
>
>   &nb=3D sp; When i calculate the drive  ability, which current should
be
> u=3D sed,the transient current or the stable current.
>
>   &=3D nbsp;           &nbs=3D p;    Best wishes .
>
>
> --=3D20
>
> ___________________________________________________________
> Sign-up f=3D or Ads Free at Mail.com
> http://www.mail.com/?sr=3D3Dsignup[1]
>
> --- Links ---
>   1
3D"http://mail01.mail.com/scripts/payment/adtracking.cgi?bannercode=3D
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>=20

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 =20

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Old (prior to June 6, 2001) list archives are viewable at:
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