[SI-LIST] FW: Re: Ground, the preferred reference plane
- From: "Sanchez, Louis" <louis.sanchez@xxxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Fri, 13 Dec 2002 10:14:45 -0800
-----Original Message-----
From: Sanchez, Louis
Sent: Friday, December 13, 2002 10:04 AM
To: 'chris.cheng@xxxxxxxxxxxx'
Subject: RE: [SI-LIST] Re: Ground, the preferred reference plane
Hi............
According to page 3 of JEDEC Standard No. 8-9:
[1] Table 1: VREF shall be 1/2 of VDDQ, and track changes in VDDQ.
[2] Table 1: VDDQ Tolerance: +/- 8%.
[3] Note 3 in notes section: Peak-to-peak noise on VREF may not exceed +/-
2% of VREF (dc).
[4] Table 1: VTT is constrained to be between VREFmin-40mv and
VREFmax+40mv.
There does not appear to be a specification for AC changes in VTT. My guess
is that load step current demands
by memory modules (can be 3 amps), VTT power supply ripple (switcher is
common source of VTT), and AC/DC changes
from any other source are to be constrained to lie between the limits
described in [4] above (VREF +/- 40 mv). One could
argue about how to best treat AC noise on VTT, because it is not specified
in the JEDEC standard. As a designer, I
think that I would take the conservative position of interpreting [4] to
mean that all changes, both AC and DC shall
lie between the limits of VREFmin-40mv and VREFmax+40mv.
I have seen application literature from various sources that suggest using
resistive divider networks to derive VREF,
because the load current from the MOS inputs of memory modules are so small.
They also recommend that each of the resistors in the divider network be
bypassed with a .1 uF capacitor in order to couple
AC noise on VDDQ, so that AC noise is coupled to VREF with the same 1/2
factor as is used for DC.
Lou
-----Original Message-----
From: Chris Cheng [mailto:chris.cheng@xxxxxxxxxxxx]
Sent: Thursday, December 12, 2002 7:13 PM
Cc: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Ground, the preferred reference plane
Bad idea. If you don't understand why, send me private email.
>The intent of this is to ensure DC tracking only, not rejection of common
mode noise. There is no need >to make the VTT track AC noise in any case,
our only goal is to make it act like a voltage source across >the frequency
range we need while coupling the minimum amount of noise between signals.
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