[SI-LIST] Re: FW: Backplane Edge Plating
- From: "David Kaiser" <david.kaiser@xxxxxxxxxx>
- To: <jgroberts@xxxxxxxxxx>, <fzanella@xxxxxxxxxxxx>
- Date: Mon, 16 Dec 2002 09:46:35 -0700
What frequencies and edge rates are you talking?
David Kaiser
4 McDATA Pkwy.
Broomfield, CO 80021
(720) 558-4431
david.kaiser@xxxxxxxxxx
-----Original Message-----
From: nsi041350-Roberts [mailto:jgroberts@xxxxxxxxxx]
Sent: Monday, December 16, 2002 9:40 AM
To: fzanella@xxxxxxxxxxxx
Cc: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: FW: Backplane Edge Plating
Hi,
I am not at liberty to give you information.
However I can tell you that we have invested much time and cost into
the reduction of radiated emc and have found much evidence in our=20
systems of reduction by stitching. [Bell Labs]
Edge plating is not a practice we have found needful.
The reason for the need for edge sealing is that many layout components
will launch modes that can propogate between earthplanes.
In my previous design and research tasks I needed to produce these
modes for special antenna work and therefore know these mechanisms.
One that we all use in layout is the rightangle or 45deg bend.
Another is a via stub.
There are more but you can take it as read that a multilayer will=20
produce these modes.
How much a problem these are is for the individual application.
These same modes will also transport and receive crosstalk.
--=20
Regards, __________ James G Roberts
/___ ____ | jrobert@xxxxxxxxxxxxxxxxxxxxx
Jim __ / /___/ / jgroberts@xxxxxxxxxx
/ /_/ /---| | Room: BE436, Hilversum
\____/ /_/ Tel: +31 35 687 4308 Fax: 5976
Fabrizio Zanella wrote:
>=20
> From: Ritchey Lee [mailto:leeritchey@xxxxxxxxxxxxx]=3D20
> Sent: Friday, December 06, 2002 3:16 PM
> To: Fabrizio Zanella
> Subject: Re: [SI-LIST] Backplane Edge Plating
>=20
> Fabrizio,
>=20
> You don't need to do edge plating or stitching. The notion that EMI
> leeks
> out the edges has no foundation. I just shipped another system with a 36
> layer BP containing 2600 2.5 GB/S signals in it using neither of those
> tactics. The box passed CISPR B on the second test. First test failed
> due
> to inadequate seals along the plug in card face plates.
>=20
> I've been involved in about 15 systems of this complexity and never used
> those tactics. All of the systems passed EMI.
>=20
> I'm mystified about where those "rules of thumb" originated. No one has
> ever provided any analytical or measured evidence that they are need or
> effective. Perhaps there is someone out there in SI land who knows
> their
> origin.
>=20
> Lee
>=20
> Fabrizio Zanella wrote:
>=20
> > I'd like to inquire about the merits of edge plating the 4 sides of a
> > backplane, with via stitching every couple of inches. Does anyone
> have
> > measured data to prove that this practice is worthwhile for shielding?
> >
> > Thanks and regards,
> >
> > Fabrizio Zanella
> > Signal Integrity Engineer
> > Broadbus Technologies
> > 978-264-7937
> > fzanella@xxxxxxxxxxxx
> >
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