[SI-LIST] FPGA supply surrent
- From: "Gopalakrishnan Sethuraj" <gopalakrishnan.sethuraj@xxxxxxxxx>
- To: <hgm@xxxxxxxxxxx>, <peter.zhu@xxxxxxxxxx>,<si-list@xxxxxxxxxxxxx>
- Date: Mon, 2 Dec 2002 14:17:02 +0530
hai
What is the supply current for ALTERA APEX series FPGA EP20K30E(1.8
voltage).The operating frequency of FPGA is 50Mhz
Regards
Gopalakrishnan.S
-----Original Message-----
From: Henrik G. Madsen [mailto:hgm@xxxxxxxxxxx]
Sent: Monday, December 02, 2002 1:55 PM
To: peter.zhu@xxxxxxxxxx; si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: How to select the pullup/pulldwon resistor
Hey Peter
For unused inputs the issue is simple and a matter of pure math and how =
much noise margin you would like to have.
If you look at a datasheet for a SN74LS74A, it specify the maximum input =
leakage current in high and low state
Iih =3D 40uA (Vi=3D2.7V)=20
Iil =3D -0.8mA (Vi=3D0.4V)
If the minimum supply voltage is 4.5V (5V +-10%) and you want a noise =
margin of 400mV (standard for TTL), then the pullup and pulldown =
resistor values are giving by.
Rpullup <=3D (4.5V -(2.0V +0.4V))/ 40uA =3D 52.5 k ohm
Rpulldown <=3D (0.8V-0.4V)/ 0.8mA =3D 0.5 k ohm
The huge difference in requirement to the pullup and pulldown is caused =
by the difference in leakage current and the distance from Vih/Vil to =
the supply voltages.
In modern CMOS electronic, the leakage current is lower and the Vih/Vil =
are placed more symmitrically between power supplies.
On top of that you often wnat to reduce the number of different types of =
components as much as possible to reduce production cost.
Hence many schematics will only contain a couple of different resistor =
values, hence a simple pullup might be a 2.77k +- 0.1% because the size =
and precission is necessary somewhere else in the schematic.
Regards
/Henrik
-----Original Message-----
From: peter zhu [mailto:peter.zhu@xxxxxxxxxx]
Sent: 28. november 2002 12:47
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] How to select the pullup/pulldwon resistor
Hi all:
In hardware design, we often encounter the problem of pullup or pulldown =
resistor, i very puzzled about it:
1.how to determine pullup or pulldown.
2.how to determine the value of pullup or pulldown resistor.
These are two common hardware design problem. I hope can see some =
detailed materials about it. Help me!
Regards!
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