[SI-LIST] Re: Eye width for microstrip and stripline configuration in PCIE gen2 simulation.
- From: Siddharth Rajagopalan <maxsidhu@xxxxxxxxx>
- To: Jory McKinley <jory_mckinley@xxxxxxxxx>
- Date: Fri, 22 Feb 2013 08:18:37 +0530
hi joseph,
I agree with your statement. But doesn't the insertion loss include the
effect of cross talk as well??(i.e. the signal which is received at the
receiver end includes the coupling effect of adjacent pairs as well.)
Regards,
Siddharth Rajagopalan
On Thu, Feb 21, 2013 at 11:55 PM, Jory McKinley <jory_mckinley@xxxxxxxxx>wrote:
> Mode propagation travel at slightly different speeds in the microstrip
> case this inequality contributes to FEXT in your time domain eye diagram given
> similar impedance/coupling in the two cases.
> -Jory
>
>
> ------------------------------
> *From:* "Joseph.Schachner@xxxxxxxxxxxxxxxxxx" <
> Joseph.Schachner@xxxxxxxxxxxxxxxxxx>
> *To:* maxsidhu@xxxxxxxxx
> *Cc:* si-list@xxxxxxxxxxxxx
> *Sent:* Thursday, February 21, 2013 1:00 PM
> *Subject:* [SI-LIST] Re: Eye width for microstrip and stripline
> configuration in PCIE gen2 simulation.
>
> microstrip, because it is not sandwiched between ground planes, is more
> susceptible to crosstalk than stripline. Cross talk might be the cause of
> more eye closure with microstrip.
> Another likely cause is that with microstrip the electromagnetic field
> exists both above the microstrip (in the air) and below it (in the
> substrate). That non-homogeneous medium makes the dielectric constant
> vary with frequency which means it is dispersive - the phase velocity
> decreases with increasing frequency. That pulls fast edges apart. And,
> the characteristic impedance changes with frequency ... I don't remember
> exactly how to describe that. These effects can be small depending on
> usage, but one thing is certain: they will contribute to eye closure for
> microstrip and they basically do not exist for stripline.
>
> Insertion loss is not the only thing that needs to be considered.
>
> --- Joe S.
>
>
>
> From: Siddharth Rajagopalan <maxsidhu@xxxxxxxxx>
> To: si-list@xxxxxxxxxxxxx, "Moran, Brian P" <brian.p.moran@xxxxxxxxx>
> Date: 02/21/2013 11:24 AM
> Subject: [SI-LIST] Eye width for microstrip and stripline
> configuration in PCIE gen2 simulation.
> Sent by: si-list-bounce@xxxxxxxxxxxxx
>
>
>
> Dear experts,
> I am currently working on a PCIE gen2 simulation. I am evaluating both the
> microstrip and the stripline configurations.As expected, the stripline
> configuration yields more insertion loss than the microstip one. This
> however is not reflected in the eye diagram since the stripline has a
> better eye width than the microstrip one. I was of the understanding that
> higher insertion loss manifests itself as higher rise time degradation in
> the time domain. I might exposing my ignorance in the previous statement.
> kindly help me clarify this.
> Thanks,
> siddharth rajagopalan
>
>
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