Listed below is an updated version of the AMS automated eye jitter measurement tool. This one has the synchronization enhancement added. It will automatically track the center of the eye (with the only restriction that the first two transitions must have less than 50% jitter). This model adds virtually no additional simulation time to either transistor or behavioral model simulations. If you are unfamiliar with HDL, lines beginning with double-dash are comments. The output is a voltage versus time trace which is proportional to the total jitter up to that point in time. In most cases, it resembles an exponentially rising waveform heading towards an asymptote (like a charging capacitor). This model is designed as a stand alone device which can be instantiated anywhere along a transmission line one wishes to measure jitter, or could be integrated into an RX model (i.e. after an equalization stage). It could also be enhanced to output the RMS jitter value, or the jitter spectral content. With AMS, the possibilities are almost limitless. Enjoy ... AMS FILE: (must be saved as "jitter_meas.vhd" to work properly with the IBIS 4.1 file listed further below: -- VHDL-AMS Jitter Measurement Tool -- Gary L. Pratt, P.E. -- This model is free and open to the public. -- Credit to the author is requested. -- This model is provided as-is without warranty. -- -- Attach the in_pos and in_neg terminals of -- this device to the differential signal you -- wish to measure. The voltage at the jitter -- terminal will be proportional to the zero-crossing -- jitter, in nano-seconds=20 -- -- The generic "half-period" must be set to half the period -- of the measured signal. The generic "delay" causes crossing -- to be ignored until after the delay period. -- -- The jitter for the first two crossings must not exceed -- 50% of the period. --------------------------------------------------------- -- Top level entity definition --------------------------------------------------------- -- The top level entity specifies the connections to the model -- and the parameters which the model will accept.=20 library IEEE; use IEEE.std_logic_1164.all; library IEEE_PROPOSED; use IEEE_PROPOSED.electrical_systems.all; entity jitter_meas is generic (period : integer :=3D 400; -- in ps delay : integer :=3D 10); -- in ns=20 port(terminal in_pos, in_neg, jitter : electrical ); end jitter_meas; --------------------------------------------------------- -- Behavioral architecture of jitter measurement model --------------------------------------------------------- -- The architecture contains the working part of the model -- If necessary, the architecture can be distributed in compiled -- form to protect any sensitive IP in the model architecture behavioral of jitter_meas is -- Just like any good programming language, everything must be declared -- before it is used -- Quantities are the analog connections. They understand Kirchoff's -- laws. They are used for simultaneous programming. -- Vin is a floating node. "vjitter" and "ijitter" are the voltage and=20 -- current across the terminal "jitter" which was declared in the Entity quantity vin : real; quantity vjitter across ijitter through jitter; =20 -- Signals are the digital connections. They simulate much faster, so -- use signals whenever possible. Digital signals can be two-state -- (high and low), three-state (add unknown), 9 state (like we are most -- familiar with). They can also be Boolean, and integers and real=20 -- numbers! =20 -- Signal "rising" is used to signal a threshold crossing event and -- record which direction was crossed -- "jitter_sig" is used to store the jitter value. signal rising : boolean :=3D false; signal jitter_sig : real :=3D 0.0; begin =20 -- first, convert the differential signal to single-ended -- notice, this is where we use the "free quantity" vin -- declare above. This is a "simultaneous statement" vin =3D=3D in_pos'reference - in_neg'reference; =20 -- This next line may be a new concept. 'above is an=20 -- attribute which returns a boolean signal based on the=20 -- value of an analog quantity. It is a very basic A/D -- converter. So, signal "rising" actually holds two pieces -- information. The fist is if vin is above or below 0.0.=20 -- The second is an event if the transition occurred on the=20 -- current time step. rising <=3D vin'above(0.0); =20 -- Now, we use the "rising" event to trigger a process -- This is very efficient, since the process only runs on -- the zero crossings of the measured signal. -- The process then uses sequential programming (basically -- the same as C) to track the jitter. -- Note, the only way to get information out of a process -- is with a signal. That is where "jitter_sig" comes in. -- You see, it gets assigned the jitter value at the end -- of the process. process (rising) -- run this process on every transition variable first_time_through : boolean :=3D true; variable frame_offset : integer :=3D 0; variable transition_time : integer;=20 variable first_transition, last_transition : integer :=3D = period/2; variable adjust : integer; begin -- wait for waveform to settle if now > delay * ns then -- Center the frame on the first transition if first_time_through then first_time_through :=3D FALSE; frame_offset :=3D (now/(1 ps) rem period) + period/2 ; end if; -- first time through -- Determine where the transitions is wrt the frame transition_time :=3D (now/(1 ps) - frame_offset) rem period; -- See if the transition is outside existing envelope if transition_time < first_transition then first_transition :=3D transition_time; elsif transition_time > last_transition then last_transition :=3D transition_time; end if; -- Adjust the frame so its centered on the transition area =20 adjust :=3D (last_transition + first_transition - period) / 2; frame_offset :=3D frame_offset + adjust; -- adjust the old measurements to the new frame first_transition :=3D first_transition - adjust; last_transition :=3D last_transition - adjust; -- Convert the jitter to a signal to use outside the process jitter_sig <=3D real(last_transition - = first_transition)/1000.0; end if; -- now > delay =20 end process; -- Now, since IBIS 4.1 will only accept analog values, -- we must convert the jitter signal back to a quantity to=20 -- output out of the model. =20 vjitter =3D=3D jitter_sig'ramp(100.0e-12,100.0e-12); =20 end behavioral; =20 IBIS 4.1 FILE: [IBIS Ver] 4.1 [File Name] jitter_meas.ibs [File Rev] 1.1 [Date] 13 JUNE 2005 [Source] =20 | [Notes] =20 | |*********************************************************************** ******* | [Component] JITTER_MEAS [Manufacturer] Mentor Graphics | [Package] |Variable Typ Min Max R_pkg 0 0 0 L_pkg 0 0 0 C_pkg 0 0 0 | | [Pin] signal_name model_name R_pin L_pin C_pin 1 INP NC =20 2 INM NC 3 jitter NC | |*********************************************************************** * | [Diff Pin] inv_pin vdiff tdelay_typ tdelay_min tdelay_max 1 2 0 0 [Series Pin Mapping] pin_2 model_name function_table_group |1 3 R_1G_ohm 2 3 R_1G_ohm | |Declare the node which returns the jitter value from the model | |Instantiate the jitter measuring model [circuit call] jitter_meas port_map inp 1 port_map inm 2 port_map jitter 3 signal_pin 3 [end circuit call] | |Declare the jitter measuring model, and describes its language, location, |Input and output ports, and parameters it will accept [external circuit] jitter_meas language vhdl-ams corner all jitter_meas.vhd jitter_meas(behavioral) ports inp inm jitter=20 parameters half_period delay [end external circuit] | | | |*********************************************************************** ***** | [Model] R_1G_ohm Model_type Series Polarity Non-Inverting | typ min max C_comp 0 0 0 | |*********************************************************************** ***** | | typ min max [Voltage range] 5.0V 5.0V 5.0V | |*********************************************************************** ***** | [R series] 10000000000 10000000000 10000000000 [End] -----Original Message----- From: Pratt, Gary=20 Sent: Thursday, April 14, 2005 6:11 AM To: 'Scott McMorrow'; tom@xxxxxxxxxxxxx Cc: twesterh@xxxxxxxxx; si-list@xxxxxxxxxxxxx; ray.anderson@xxxxxxxxxx Subject: RE: [SI-LIST] Re: Eye diagram measurement - And leaves your teeth Shiny White Too! As I've mentioned before, I can't speak for management but apparently it is very difficult to justify funds to promote a public standard. So, there is no one with work hours to devote to this type of activity. But, here is a quick example of the beginning of such a model, and its IBIS 4.1 wrapper. It only measures jitter, and it needs some enhancement in the synchronization area, but it should give a feel for what is involved. It took a couple of hours to write and test (plus a little more to add the extra comments). Its actually a pretty good example to show all three coding methods AMS supports (sequential, concurrent, and simultaneous). But, only shows one of the modeling styles available (structural, data flow, and conservative).=20 =20 To address Scott's question, more than likely this would be incorporated into a larger receiver model (possibly containing receive equalization as you can see in the Altera receiver model). Or, it could possibly be maintained as a standalone model that can be instantiated anywhere in the circuit where you wish to measure. Since the wrapper is in IBIS format, it would be instantiated in your design just like any other IBIS device. =20 The AMS model is listed below, followed by its IBIS 4.1 wrapper. I've also posted a color version of the listing to the Mentor ftp site which is much easier to read. But, it will only be there for three days, so grab it quick (Ray, is this worth posting to the SI list file area?). Point your browser to ftp://supportnet.mentor.com/outgoing/IBIS/jitter_meas.zip. Log in as anonymous with your email address as password if necessary. A 35ns simulation of an AMS PCI Express driver took 5.8 seconds alone, and 6.3 seconds with the jitter measuring tool added. So, it added about one-half second to a 35ns simulation. (Adding this to a transistor-level simulation would probably have produced an immeasurably small increase in relative simulation time.) =20 This model is released to the public domain. But, the only guarantee provided is that it is worth every penny you paid for it.=20 =20 Gary =09 =20 ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List FAQ wiki page is located at: http://si-list.org/wiki/wiki.pl?Si-List_FAQ List technical documents are available at: http://www.si-list.org List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu