[SI-LIST] Re: External Influences on DRAM Refresh Rate?
- From: Hermann Ruckerbauer <Hermann.Ruckerbauer@xxxxxxxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Thu, 27 Mar 2014 15:13:46 +0100
Hello Jason,
DRAMs are tested and repaired with quite some margin on the normal
refresh rate. This should be something that DRAM vendors have experience
and should be able to test the cells accordingly.
But each new technology node can have different leaking mechanisms and
it might take a while until a DRAM vendor has the technology under
control. Should not be the case, but is possible.
The bad thing is, that the cells can degrade, e. g. during the soldering
process. If you buy DIMMs from one of the big vendors they should have
the ability to repair single bits even after mounting the DRAM onto a
DIMM (if they test these).
If you mount the DRAMs onto your board on your own you will not have
this ability and you need to live with this degradation.
This might also depend on the quality and volumen that you buy .. if you
buy just a view cheap DRAMs you might get some that are tested with a
standard testflow. If you buy enough high quality you might convince the
DRAM vendor that you need an extended testflow. Testing is quite
expensive, so test time reduction (without compromising quality) is one
of the main objectives a DRAM vendor will have for his engineering ..
The other thing are the 85°C. This is the DRAM case temperature ... some
people think this is environment temperature.
So to really test the refresh in your system you need to make sure that
your test environment results in this temperature. So e. g. if you test
your system at 60C you need to make sure that you run the stuff that is
generating heat at full speed, but without to many DRAM accesses (each
access will refresh the DRAM). But you still need to accessthe DRAM for
the selfheating of the DRAM to be accounted. For the rest of the array
you write data, wait and read data. During this procedure you need to
measure the DRAM case temperature (and maybe adjust your environment
temperature in order to come close to the 85C). The only System DRAM
test that I know that is capable of such a test scenario is our SM-Test.
Hermann
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schrieb Jason Pritchard:
> Hi All,
> I'm curious if anyone has identified other factors that influence the refresh
> rate of DRAM (on a DIMM) besides temperature?
>
> DIMMS are typically rated to 85C before the refresh rate needs to increase,
> but I have seen instances where the refresh rate had to be modified well
> before that point to avoid errors.
>
> Are there external board related influences that could work in conjunction
> with temperature to decrease the rating of the DRAM?
>
> OR is this a case that the DRAM manufactures don't really have a good way to
> identify weak bits and you should expect DRAM to fail below the specified
> temperature?
>
> Thanks,
> Jason
>
>
>
>
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