Hi , I'am doing a form factor board where few signals are brought from top layer to the bottom layer with thru hole Via's.On the bottom layer these signals will be connected to the square pads laying on the edges of the PCB.The Via from the top layer directly goes to the bottom side square pad.The PCB's are 4 to 6 layers. These form factor boards with sqaure pads will be soldered to another Mother board , where you can access these signals. I have a 100 Mhz clock as one signal.I'am using via sizes of 6 mil drill & 10 mil pads. Would be safe to increase the drill size & the pad size. If one of the signal is an 5.0 Ghz RF signal , is it safer to use bigger via's. I have no access to EM simulator at this time.. Can some one pls throw some light on this.I would also like to know the approx inductance & capacitance for these Via's. Thanks in Advance !! Best Regards Sunil.b ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List technical documents are available at: http://www.si-list.net List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu