[SI-LIST] Re: ESD failure - need advise
- From: keithK EPD <epd2001usa@xxxxxxxxxxx>
- To: "weirsi@xxxxxxxxxx" <weirsi@xxxxxxxxxx>, "si-list@xxxxxxxxxxxxx" <si-list@xxxxxxxxxxxxx>
- Date: Tue, 23 Sep 2014 20:16:53 -0400
i have successfully put an exposed copper pad with a esd device connected to
chassis ground to bleed off any charge incurred (generated) by the lightpipe
POF.
the light pipe holder (LED holder) is placed flush with the surface of the PCB.
The
esd gap is very small and the static charge jumps the air gap - then dissipated
through
the diode array to chassis gnd. Not GND - keeping it "isolated" - kinda .....
it works
really well with light pipes (no mask in that area of the exposed copper),
oxidation
of the copper has yet to be a problem.
I hope this gives you an idea or two.
keith kowal
keith@xxxxxxxxxxxxxxxxxxx
> Date: Tue, 23 Sep 2014 16:20:27 -0700
> From: weirsi@xxxxxxxxxx
> To: si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] Re: ESD failure - need advise
>
> CM ESD energy is converting to DM noise. Your flex cable should be an
> immediate suspect. That said, you could suffer from any of the many
> ills that Doug Smith regularly writes about.
>
> Going after the problem with software now that the product has already
> been designed is probably not a very productive approach. Software is a
> good way to test ideas and assess risk while you are still making design
> decisions. If you go the software route now, it will after you learn to
> use it and get your models set-up properly tell you what you already
> know: Your design fails.
>
> Steve.
> On 9/23/2014 3:48 PM, Ramesh N wrote:
> > Hello Experts,
> > Greetings!!!
> > we are having ESD fail (in regulatory testing) in one of our design.
> > It's simple wireless DAQ system with 2 boards [controller PCB + LED/Sensor
> > PCB]. FPC cable (5") is used as interconnect.Package is abs plastics.
> > Light-pipe is used for the for led indication. When +8kV is applied through
> > air discharging, inadvertent LED trigger occurs . Randomly, system is also
> > hanging when multiple zapping applied (especially for 8kV voltage level).
> > I have tried to limit airgaps, added filter caps, etc but issue is not
> > entirely solved.
> >
> > Is there any ESD simulation/analysis tool available for addressing this
> > failure analysis?
> > Any help/debug tips related to this would be very helpful.
> >
> > Thanks and regards,
> > Ramesh
> >
> >
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>
> --
> Steve Weir
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