[SI-LIST] Doubt about DDR1 memory module's CLK topology
- From: Lijinxing <venussoso@xxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Sat, 25 Sep 2010 14:40:26 +0800 (CST)
Hi, SI experts.
I have some questions about DDR1 memory module's clock topology.
There are three pairs of differential clock, let's take 2R * 8 unbuffered
memory for instance, there are 16 DRAMs in all, so dividing the load to 6,6,4
DRAMs for the CLK, as the following illustration:
6 loads:
/DRAM1
/ \DRAM2
/ DRAM3
CLK -------------/
\ \ DRAM4
\ / DRAM5
\DRAM6
4 loads:
/DRAM1
/ \DRAM2
/ Cap
CLK -------------/
\ \ Cap
\ / DRAM3
\DRAM4
The standard for the Cap in 4 loads condition is, equal to 1/2 DDR SDRAM
input capacitance.
My question is:
1. What's the purpose of these Cap.s, balancing the load? Or matching
impedance? Signal termination?
2. In a condition, the DRAM input capacitance is 2pf, so the referenced
value is 1pf, and I measured the signal
Hi, SI experts.
I have some questions about DDR1 memory module's clock topology.
There are three pairs of differential clock, let's take 2R * 8 unbuffered
memory for instance, there are 16 DRAMs in all, so dividing the load to 6,6,4
DRAMs for the CLK, as the following illustration:
6 loads:
/DRAM1
/ \DRAM2
/ DRAM3
CLK -------------/
\ \ DRAM4
\ / DRAM5
\DRAM6
4 loads:
/DRAM1
/ \DRAM2
/ Cap
CLK -------------/
\ \ Cap
\ / DRAM3
\DRAM4
The standard for the Cap in 4 loads condition is, equal to 1/2 DDR SDRAM
input capacitance.
My question is:
1. What's the purpose of these Cap.s, balancing the load? Or matching
impedance? Signal termination?
2. In a condition, the DRAM input capacitance is 2pf, so the referenced
value is 1pf, and I measured the signal under 1pf configuration, is perfect. If
I exchange the Cap.s to 2pf, the clock performs very bad, the undershoot is
significant, and the rise edge is much faster than the referenced condition. In
addtion, when I remove the Cap.s or use 3.3pf, it also performs much better,
can someone give me an explaination?
3. What is the disadvantage by removing these 2 Cap.s? And why use Cap.s,
can resistor or inductor work?
Any reply is appreciated, thanks.
John.
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