[SI-LIST] Does anyone use "buried capacitance" layers?
- From: "tom_cip_11551" <tom_cip_11551@xxxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Wed, 25 Jun 2008 16:02:44 -0000
Hi,
I first heard about buried capacitance (not to be confused with
embedded capacitance) for power and ground, using thin dialiectrics,
over 10 years ago, from the original papers that Hadco had published.
I had thought that since the technology has been around for so long
that most fab houses would be able to use it.
I figured that my latest PCB, that is running signals at over 3 Gb/s,
and has some limitations in terms of space for decoupling caps, would
be a good candidate for a bured capacitance layer (two layers and a 2
mil dialectric core). When I sent the board out for quote I was
surprised to learn that only Sandmina Circuits "owns" the technology
and very few other vendors have licensed it.
So, I would like to know from the SI community at large, if this
technology is widely used. If so, could I get the name of some
alternate vendors that have licensed it?
Also, what is the general consenus of the viability of buried
capacitance (not embedded capacitance).
Thank You
Tom
tom_cip_11551@xxxxxxxxxxx
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