Dear Simon, Yes, you are correct in that just widening the trace width increases the capacitance by the simple increase in area between parallel plates.... the problem is that for proper Signal Integrity design one is always concerned about maintaining the characteristic impedance of the design to minimize reflections at high frequencies. Typically when one widens the trace, the dielectric thickness is increased to maintain the correct characteristic impedance, and in turn the L and C per unit length stays the same as the trace width is increased since one is keeping Zo fixed Zo =3D (L/C)^0.5. =20 The other thing to look at is that for stripline where the dielectric material is uniform around the conductor the dielectric constant does not change with trace width. This is not true for microstrip, microstrip has a combination of air and PCB dielectric and Eric Bogatin's book on Signal Integrity Simplified on page 144 has a nice plot showing how the "effective" dielectric constant changes with line width. So for microstrip you may see a slight increase in loss with an increase in trace width but not for stripline. Regards, Heidi Barnes -----Original Message----- From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On Behalf Of Partha Simon Sent: Friday, April 20, 2007 9:15 AM To: Zhenggang Cheng Cc: si-list@xxxxxxxxxxxxx Subject: [SI-LIST] Re: Disadvantages of wider traces Hello Cheng, At higher frequencies we model transmission lines as Lossy Lines, along with defuault transmission line modeling, we consider Skin Effect as series component and Dielectric loss in parallel, which is dependent on the capacitance per length and which is highly influencied by loss tangent of the material, as we increase the trace with capacitance per length increases which causes Dielectric loss to increase. Dielectric loss causes high frequency components attenuation which casues rise and fall time degradation, which leads to Inter Symbol Interference. Regards, Simon On 20/04/07, Zhenggang Cheng <zcheng@xxxxxxxxxx> wrote: > > Hi Simon, > > What do you mean that wider trace will reduce skin-effect? And how is > that related to dielectric loss? To me, if skin-effect is reduced, it > means R is deceased, and then copper loss is decreased. > > Look forward to your reply. > > Thanks, > > Zhenggang > > -----Original Message----- > From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] > On Behalf Of Partha Simon > Sent: Thursday, April 19, 2007 6:02 AM > To: babid_a@xxxxxxxxx > Cc: si-list@xxxxxxxxxxxxx > Subject: [SI-LIST] Re: Disadvantages of wider traces > > Hello, > Wider traces will lower the Z0 and may cause anti -reflection and it > depends > on what stack you are using, for typical 6-layer and nomial freqenciese > they > work well, and at higher higer frequencies they reduce skin-effect and > may > cause more dielectric loss. > > To work between these tradeoffs we need simulator and we cant generalise > the > case. > > Regards, > Simon > > > On 19/04/07, Babid A <babid_a@xxxxxxxxx> wrote: > > > > Hello, > > Assuming that there is a chance for routing traces as wide as > possible, > > what are the disadvantages of having wider traces on the boards > (>12mil) in > > respect to noise, jitter etc? > > > > -Thanks, > > > > > > > > > > > > --------------------------------- > > Ahhh...imagining that irresistible "new car" smell? > > Check outnew cars at Yahoo! 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