[SI-LIST] Diif pair geometry trade offs

  • From: "Joel Brown" <joel@xxxxxxxxxx>
  • To: "SI-List" <si-list@xxxxxxxxxxxxx>
  • Date: Wed, 13 Jun 2007 11:46:26 -0700

I am working with a layout that uses diff pairs routed as stripline on
internal layers and micro strip on outer layers. These include PCI Express,
USB, LVDS, Ethernet.
There are guidelines I have read that recommend spacing between pairs and
between other signals should be at least 3x dielectric height for stripline
and 4x dielectric height for microstrip.

I am using 13.5 mils dielectric height for the internal layers which means I
need spacing of 40 mils.

If I want to increase my routing density (decrease spacing) then I would
need to decrease the dielectric height.

In order to do this I would have to increase the inter pair spacing to
maintain 100 ohms impedance which would reduce the inter pair coupling and
increase the coupling to the reference plane.

This means more current would flow on the plane. My understanding is that
this plane current flows in a circular loop on the plane underneath the diff
pair traces essentially cancelling itself out to some degree. My question is
there any issue (EMI or other) with forcing more of the return current to
flow on the planes? If density was not an issue would it be desirable to
make the dielectric height as large as possible to reduce reference plane
current?

 

Thanks - Joel

 



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