[SI-LIST] Decoupling in DDR3 Applications
- From: Hirshtal Itzhak <ihirshtal@xxxxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Thu, 18 Feb 2010 14:57:12 +0200
Hello Experts!
I found out that the Unbuffered DIMM Design Specification 21C Page
4.20.19-30 (Revision 1.01 Nov 2009) recommends to decouple VTT by
decoupling capacitors to VDD. VREFCA has the same recommendation.
On the other hand, on the same page, VREFDQ is recommended to be
decoupled to VSS.
Also, I couldn't find any specific recommendation for the decoupling
voltage in the Unbuffered SO-DIMM Reference Design Specification 21C
Page 4.20.18-28 (Revision 1.0 Feb 2009).
Does anyone happen to know why decoupling is recommended to be done to
VDD rather than VSS in all cases? It seemed to me that VSS was always
the preferred voltage to decouple to. And if there's a good reason for
not doing it, then why the differences between the various voltages and
the two DIMM specs?
Also, is there a difference in regard to embedded (non-DIMM)
applications?
Thanks
Itzhak Hirshtal
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