[SI-LIST] Re: Decoupling capacitors for BGA

  • From: Balaji S <Balaji.S@xxxxxxxxxxxx>
  • To: si-list@xxxxxxxxxxxxx
  • Date: Sat, 13 May 2006 13:52:11 +0530

Hi All,
Adding to Subramanian's query, if the caps are placed around the BGA, then 
can we use capacitor networks for decoupling to save real estate??

Regards
Balaji S 





"Dagmara Avanindra" <dagmara.avanindra@xxxxxxxxx> 
Sent by: si-list-bounce@xxxxxxxxxxxxx
05/13/2006 09:13 AM
Please respond to
dagmara.avanindra@xxxxxxxxx


To
subramanian1683@xxxxxxxxx
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[SI-LIST] Re: Decoupling capacitors for BGA






Subbu,
if your board is not thick, you may want to consider using 0201 caps
directly underneeth the BGA aray, especially if GND and VDD are located
directly diagonally across from each other.

If you connect caps via individual traces to the pins, you will get alot 
of
resistivity.
Which can be a plus if your goal is to dampen high-frequency noise. 
However,
if you make traces very thin and long, you may slow your response time 
too.
So calculate your resisitivity per square to figure out what is the 
optimal
cap connection for you.

Dagmara

On 5/12/06, Subramanian R <subramanian1683@xxxxxxxxx> wrote:
>
> Hello All,
> We are using a 0.5mm Pitch 457-Pin BGA Processor. It is running at a
> maximum
> of 532MHz.
> It has 60 Power pins (Core & I/O)
>
> How do i place the Decoupling capacitors?
>
> Now we have placed all decaps (0402 pack) around the BGA (like an 
island)
> and connected it to the VCC plane. Should i need to route it to the
> individual pins itself?
>
> The BGA does not have much space between the Balls. So not more than 4-5
> caps can be placed right over the BGA on the other side.
>
> The other thing i can go for is Inter-plane capacitance. But for that
> VCC-GND dielectric should be around 2-3mils, i understand. That doesn't
> look
> possible with our PCB thickness requirements. It is a 6-layer PCB
>
> Thanks for any suggestions.
>
> Regards
> Subbu
>
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