[SI-LIST] Re: Decoupling capacitors for BGA
- From: Joe Paul M <joepaulm@xxxxxxxxx>
- To: <si-list@xxxxxxxxxxxxx>
- Date: Tue, 16 May 2006 16:54:36 +0530
HI Subbu,
I saw the replies you got and the refernce docs they specified
They will give you a good idea on giving optimal decoupling.
But ,
the 6 layer stack up you are using doesnt sound good to me.
I dont know , what is the kind of stack up you are using ,but if you dont
have an an adjacent VCC-GND pair , you are inviting a lot of troubles.
With a processor runningat 532 Mhz , I suggest you to improve the stack up
to an 8 layer one ,with a pair of toughtly coupled VCC-GND layer pair.
According to me the cost you pay for the extra 2 layers is not much ,
compared to the advantage it brings.
Gurus: Please correct if I am wrong.
Regards
Joe Paul
----- Original Message -----
From: "Subramanian R" <subramanian1683@xxxxxxxxx>
To: <si-list@xxxxxxxxxxxxx>
Sent: Friday, May 12, 2006 2:32 PM
Subject: [SI-LIST] Decoupling capacitors for BGA
> Hello All,
> We are using a 0.5mm Pitch 457-Pin BGA Processor. It is running at a
> maximum
> of 532MHz.
> It has 60 Power pins (Core & I/O)
>
> How do i place the Decoupling capacitors?
>
> Now we have placed all decaps (0402 pack) around the BGA (like an island)
> and connected it to the VCC plane. Should i need to route it to the
> individual pins itself?
>
> The BGA does not have much space between the Balls. So not more than 4-5
> caps can be placed right over the BGA on the other side.
>
> The other thing i can go for is Inter-plane capacitance. But for that
> VCC-GND dielectric should be around 2-3mils, i understand. That doesn't
> look
> possible with our PCB thickness requirements. It is a 6-layer PCB
>
> Thanks for any suggestions.
>
> Regards
> Subbu
>
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