[SI-LIST] Re: Decoupling capacitors
- From: Larry Smith <Larry.Smith@xxxxxxx>
- To: si-list@xxxxxxxxxxxxx, sghsu55@xxxxxxxxxxxx
- Date: Tue, 4 Jun 2002 14:04:37 -0700 (PDT)
Sogo - I was away for more than a week canoeing and conferencing.
Several people have addressed the mesh density issue, so I won't go
into more detail on that. It seems that the root of your question has
to do with the choice of capacitors and frequency range where we want
to meet a target impedance on a PCB.
The overall objective in power distribution is to have the circuits on
the chip look out into the rest of the world and see a power
distribution system (PDS) that meets a target impedance across a broad
frequency range. We use many different valued capacitors in parallel
to establish a flat impedance profile across the broad frequency
range. Individual capacitors have an impedance vs frequency profile
that look like a "V". By selecting the optimum number of capacitors
with different values, it is possible to combine a lot of these "V's"
together to approach a flat curve over a broad frequency range. That
essentially presents a resistance to the load over the frequency
range.
At some frequency, the series impedance due to package inductance will
exceed the target impedance. Above that "corner" frequency, it is very
difficult (or impossible) to do anything on the PCB that will
significantly affect the PDS from the circuits perspective. Even if we
were to put a perfect short circuit from Vdd to Gnd on the PCB, the
impedance of the package inductance in series with the PCB impedance
will cause the PDS impedance to be above the target impedance at
frequencies above the corner frequency.
Depending on the target impedance and the inductance of chip packaging,
that corner frequency will most likely be somewhere between 10 MHz and
500 MHz. (As with many things in SI, it depends...) Above the corner
frequency, there is virtually nothing that you can do on the PCB to
help the chip because the package impedance dominates the path to the
PCB.
regards,
Larry Smith
Sun Microsystems
> Delivered-To: si-list@xxxxxxxxxxxxx
> X-eGroups-Return: sghsu55@xxxxxxxxxxxx
> Date: Mon, 27 May 2002 15:07:57 -0000
> From: "sogo_hsu" <sghsu55@xxxxxxxxxxxx>
>
> Larry - I have ever used SQPI once. The GUI is excellent. However,
> the problem is still which frequency component is in need of
> improvement. Subsequenctly, the decoupling capacitor that resonant on
> the corresponding frequency is added to match the required impedance.
> For example, 100MHz of resonance frequency in multinode simulation of
> SQPI. In the message you post previously, you mentioned the typical
> concidered frequency is in the range of 10MHz. Does it need to add
> high frequency decoupling capacitor to decrease the impedance in
> 100MHz?
> Besides, don't you think the mesh density in 16 by 16 is too rough to
> analyze a real PDS plane in SQPI?
>
> Sogo
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