[SI-LIST] Re: Decoupling at 800Mhz

  • From: Stefan Ludwig <ludwig@xxxxxxxxxxxxxxxxx>
  • To: Subramanian R <subramanian1683@xxxxxxxxx>
  • Date: Sat, 24 May 2008 11:35:24 +0200

Hi Mani,

if the processor runs at 800MHz, it doesn't mean that the decoupling 
requirement for the PCB will be at 800MHz. Typically, the spikes at 
800MHz will be taken care of by on-die capacitance.

As was said by others on this thread and you below, the mounting 
inductance of the package on the board and the inductive path through 
the package to the die will limit what you can do on the board. 1uF in 
0402s as close to the power/gnd pins of the package, mounted with 
vias-in-pad or vias to the side of the pads will be the best you can do 
- in addition to having close spacing between pwr & gnd planes. 
Typically, what you'll see on the board is in the range of 50-250MHz, 
depending on how well the package is designed.

I hope this helps.

Cheers,

Stefan

Subramanian R wrote:
> Hi All,
> We are planning to use a processor running at 800 MHz.
> I was just reading up on the decoupling methods.
>
> The Processor PCB guidelines recommend using 1uF 0402 pack for high
> frequency decoupling. But at 800 MHz, will not the cap/package inductance
> dominate.
>
> The guideline doesn't say anything about plane decoupling also.
>
> Am I missing something? What are the best approaches for decoupling?
>
> Any suggestions will be very useful.
>
> Thank you in advance,
>
> Regards
> Mani
>   
-- 

Ludwig Systems Engineering         Consulting - Design - Implementation
WWW: www.ludwigsystems.com         System Architectures - FPGAs - PCBs
Ph/Fx: +41-43-355-58-73/74         Hardware - Firmware - Software

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