[SI-LIST] Re: DDR-Length matching

  • From: John Ellis <John.Ellis@xxxxxxxxxxxx>
  • To: karthi keyan <karthiyen@xxxxxxxxx>, "si-list@xxxxxxxxxxxxx" <si-list@xxxxxxxxxxxxx>
  • Date: Thu, 28 Apr 2011 08:56:39 -0700

Since this is a DDR interface, the +/- 10 mils probably refers to the DQ length 
relative to the DQS.  This means the DQ can be routed 10 mils shorter than the 
DQS or 10 mils longer.  This seems to be a tight spec, more like what I'd see 
on a package and not a board.

John Ellis
Sr. Staff R&D Engineer

Mixed Signals &
I/O  Libraries Group

Synopsys, Inc.

email: jellis@xxxxxxxxxxxx
Phone: 508.263.8194


-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On 
Behalf Of Loyer, Jeff
Sent: Thursday, April 28, 2011 11:25 AM
To: karthi keyan; si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: DDR-Length matching

+/-10 mils tolerance means that all signals in that group must be within 20 
mils of each other.  
If your longest trace is 6.253", and your shortest is 6.234", you have met the 
spec.
If your longest trace is 6.253", and your shortest is 6.232", you fail the spec.

The spec. could call out '+/-10 mils' or 'within 20 mils', with the same 
meaning.

The '+/- 10 mils' verbiage is usually used to align with popular layout tools' 
conventions, where you specify +/- xx mils of a defined target.  Finding that 
target is part of the process for your particular design.

When they specify this kind of tolerance, they usually also insist on routing 
on the same layer, so propagation velocity differences don't come into play.

This tight a tolerance (within 20 mils, or about 3-4ps) is usually specified 
because experience has proven that it doesn't take CAD folks much longer to 
meet a +/- 10 mil spec. than a +/- 100 mil spec., and we can reduce the skew 
from routing to essentially zero.

Jeff Loyer

-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On 
Behalf Of karthi keyan
Sent: Thursday, April 28, 2011 2:42 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] DDR-Length matching

Hi experts,
         I am working on boards having DDR interface. on layout  we are
following the below groupings & length matching


 Group1- Data signals,strobe,Mask with in group +/-10 mils tolerance
 Group2- Add/Ctrl/Cmd/Clk--with in group +/-10mils tolerance

         i am clear on groupings but on length matching i want to know how
to calculate the exact Min & max length matching tolerance .

              can you please let me clear on DDR length matching?


Thanks,
Karthikeyan


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