[SI-LIST] Re: DDR3 - Undershoot Area and Vss
- From: "Orin Laney" <olaney@xxxxxxxxx>
- To: <vkasriram@xxxxxxxxx>, <si-list@xxxxxxxxxxxxx>
- Date: Mon, 27 Jan 2014 08:28:28 -0800
1- No. VSS is the reference for the measurement, therefore assumed as 0
volts.
2- Volts times nanoseconds should not exceed the limit, e.g. 0.4V for 1
nanosecond and 0.8V for 1/2 nanosecond are both at the limit. Typically
though, max undershoot should be kept below one diode drop as a matter of
good practice.
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On
Behalf Of Sriram A
Sent: Monday, January 27, 2014 1:02 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] DDR3 - Undershoot Area and Vss
Hello,
Someone kindly help me in understanding few things to be more specific with
DDR3 Spec.
1.Do Vss value will vary based on Typ, Min and Max conditions?
Eg. Vdd/Vddq have voltage spec like 1.425V, 1.5 and1.575 respectively based
on Min, Typ and Max Conditions.(Jedec Spec) My doubt is do Vss also vary
based on this parameters?
2. Please help me in understanding Maximum undershoot area below Vss. Eg.
0.4 V-ns (as per DDR3 Jedec Spec).
Please be more specific about Vns (What is V-ns means here?) and how to
calculate the area for undershoot (in Vns) below Vss.
Thanks and Regards,
Sriram
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