[SI-LIST] DDR3 Slew Rate Measurement

From: "Ghode, Nikhil" <Nikhil.Ghode@xxxxxxxxxxxxxx>
To: "si-list@xxxxxxxxxxxxx" <si-list@xxxxxxxxxxxxx>
Date: Fri, 18 Oct 2013 16:39:26 +0000

Hi,
I am currently measuring slew rate of DDR3 (MT41J128M16JT-125IT; 1.5V) 
ADDRESS/Control signals. Measured rising set-up slew rate (750mV to 925mV) is 
2.7V/nS. Micron datasheet or JEDEC standard does not have de-rating values 
beyond 2V/nS. So my queries are-

1.       Will DDR3 interface function properly with 2.7V/nS slew rate? Should I 
slow it <2V/nS?

2.       How can I calculate de-rating values beyond 2V/nS

3.       I am measuring rising set-up slew rate between +750mV (Vref) to 925mV 
(VIH ACmin). I guess it is correct.

Also how can I set-up oscilloscope eye mask to capture DDR3 signal?

Regards,
-Nikhil


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[SI-LIST] DDR3 Slew Rate Measurement

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