[SI-LIST] Re: DDR3 Clock Signal
- From: steve weir <weirsi@xxxxxxxxxx>
- To: Jennifer Maharani <jennifer.maharani@xxxxxxxxx>
- Date: Fri, 11 Jun 2010 11:25:12 -0700
Jennifer I suggest you download a copy of the JEDEC spec. It's free.
Steve
Jennifer Maharani wrote:
> Dear all,
>
> I found that the supply voltage of DDR3 is 1.5V. How is this realized
> for the differential clock. Is it using two single-ended 0.75V or one
> differential 1.5V ?
>
> Many thanks,
> Jenni
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Steve Weir
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