[SI-LIST] DDR3 CMD/ADD/CTL signal line termination

  • From: Tesla <emcesd@xxxxxxx>
  • To: si-list <si-list@xxxxxxxxxxxxx>
  • Date: Mon, 30 Jul 2012 14:59:42 +0800 (CST)

Hi, Experts
 
For a point to point DDR3 design, a lot of IC vendors recommand using AC 
termination for the CMD/ADD/CTL signal lines.
if i change to source series termination for cost down, will it bring some cons?
 
Thanks.
 
Tesla.
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