[SI-LIST] DDR3 1600 slew rate

  • From: jing wu <jessica_wuluan@xxxxxxxxx>
  • To: "si-list@xxxxxxxxxxxxx" <si-list@xxxxxxxxxxxxx>
  • Date: Mon, 7 May 2012 16:41:13 -0700 (PDT)

Hi, All :

    I am confused when reading the derating table of DDR3 1600. In Jedec, the 
derating value is zero for slew rate 1v/ns. But for DDR3 1600, the data period 
is 625ps and swing level is 1.5V, so the DDR3-1600  SDRAM/Controller  output 
buffer slew rate will be at least 1.5v/312.5ps=4.8v/ns. By adding the PCB 
degradation and SSN noise, the slew rate at the receiver still  should be  be 
much larger than 1v/ns. I did some simulation and turns out that the slew rate 
of DQ at receiver is about 4v/ns. Is it a typical slew rate value of DDR3 1600? 


Thanks,
Jessica


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