[SI-LIST] Re: DDR2 eye-diagram masks creation

  • From: steve weir <weirsi@xxxxxxxxxx>
  • To: Hermann Ruckerbauer <Hermann.Ruckerbauer@xxxxxxxxxxxxx>
  • Date: Tue, 09 Oct 2012 08:49:20 -0700

Hermann, we may look at this a bit differently because I concern myself 
more with the physical channel.  It is my position that the most 
accurate characterization of a channel is always from the point of view 
of the receiver timing reference:  DQS for DDRx data, and CLK for A/C.  
What that does to a Tvac measurement is reduce the measured Tvac valid 
interval based on jitter between the data signals and the strobe.  I 
contend that if a reliable channel is what we are after that this 
approach is the most reliable.

Best Regards,


Steve.

On 10/9/2012 7:57 AM, Hermann Ruckerbauer wrote:
> Hello Steve,
>
> we are totally in line with this one and I never said anything different
> on the dataeye.
> This is the reason why I still use eye diagrams for memory, even this
> there is no mask defined.
> Yes, as you mention you can read out if tDS and  tDH is met and e.g. if
> the tDIPW is causing any problem. It is just not possible to generate a
> diamond shaped mask with tDS/tDH and have all parameters verified by
> this mask.
>
> I never thought about generating multiple independent masks and place
> them in the same eye... They need to be aligned independently inside the
> eye because they will will need to be measured from different times
> (t_VAC from AC crossing, tDIPW from Vref Crossing, tDS/tDH from DQS
> reference).
> But this is still not correct: Also the eye would need to be generated
> differently for this different masks. For t_VAC the generated eye needs
> to be timing referenced to the AC level crossing, for tDIPW to the Vref
> crossing. So one need to generate different eyes for each mask.
>
> I have  never seen this approach and I still think it is simpler to
> generate the eye and do a timing budget based on this one. In parallel
> the automated simulator/scope functions to do an edge by edge compliance
> test can be executed.
> The second one I'm usually adding when doing large sweeps with a lot of
> variations. These kind of test are simpler to automatize to get some
> PASS/FAIL information than looking to hundreds of eyes an calculating
> timing budgets
>
> Hermann
>
>
>
> Our next Events:
> ================
>
> "Open the Black Box of Memory"
> Seminar on 08/09. November 2012
>
> Check our website or contact us for details
>
> EKH - EyeKnowHow
> Hermann Ruckerbauer
> www.EyeKnowHow.de
> Hermann.Ruckerbauer@xxxxxxxxxxxxx
> Veilchenstrasse 1
> 94554 Moos
> Tel.: +49 (0)9938 / 902 083
> Mobile:       +49 (0)176  / 787 787 77
> Fax:  +49 (0)3212 / 121 9008
>
> schrieb steve weir:
>> Hermann, the need for multiple qualification masks does not alter the
>> either the reality or the utility of the eye.  If for example the eye
>> is narrower than tDPIW one immediately knows that they have a
>> problem.  TSimilarly, Tsu, and Th masks will determine if those
>> parameters have been met.  In all cases the geometry gives a clear
>> view of margins, positive or negative and clues as to what the major
>> impairments are.
>>
>> Best Regards,
>>
>>
>> Steve.
>> On 10/9/2012 3:59 AM, Hermann Ruckerbauer wrote:
>>> Hello Steve,
>>>
>>> I did not say, that an eye can not be drawn. I think the question was to
>>> generate a Mask and for memory up to DDR3 this is not possible (guess
>>> DDR4 changes this one):
>>>
>>> One can not take the setup/hold times and generate an eye mask with the
>>> AC/DC levels.
>>> It is not allowed to apply tDS(min) and tDH(min) at the same time,
>>> because this would violate tDIPW (data input pulse width).
>>> Or if you take tDS(min) and draw t_VAC for special speed grades the
>>> resulting "eye mask" is much larger as just tDS + tDH.
>>> So there are several timings that need to fulfilled at the same time and
>>> it is not possible to combine this in a single mask.
>>> In the video on my website the case with t_VAC is shown.
>>>
>>> As you mentioned one need to take care HOW the eye is generated. In the
>>> Source Sync system it is required to take the timing reference (so for
>>> DQ the DQS rising and falling), place this in the center and draw the
>>> corresponding DQ edges (before and after) around. This needs to be done
>>> for each DQS edge. I know that scopes can do this in the meantime .. I'm
>>> not sure how many simulators are able to evaluate an eye this way ..
>>>
>>> Even I know it is not correct: My standard Eye evaluation is an AC/DC
>>> based eye opening.
>>> Based on this I can calculate Timing budgets (accounting for DQS
>>> jitter).
>>>
>>> Maybe this is some discrepancy in wording: An eye Mask defines an area
>>> the signal is not allowed to cross. The AC/DC open Data window
>>> evaluation is NOT an eye mask even it looks somehow like this.
>>>
>>> Hermann
>>>
>>>
>>>
>>> Our next Events:
>>> ================
>>>
>>> "Open the Black Box of Memory"
>>> Seminar on 08/09. November 2012
>>>
>>> Check our website or contact us for details
>>>
>>> EKH - EyeKnowHow
>>> Hermann Ruckerbauer
>>> www.EyeKnowHow.de
>>> Hermann.Ruckerbauer@xxxxxxxxxxxxx
>>> Veilchenstrasse 1
>>> 94554 Moos
>>> Tel.:    +49 (0)9938 / 902 083
>>> Mobile:    +49 (0)176  / 787 787 77
>>> Fax:    +49 (0)3212 / 121 9008
>>>
>>> schrieb steve weir:
>>>> Hermann, I disagree a bit here.  Source synchronous busses have timing
>>>> eyes just like channels with embedded clocks.  Eye diagram captures for
>>>> source synchronous busses should trigger on the timing strobe.  Levels
>>>> need to satisfy the AC signal thresholds.  Measuring the eye is a
>>>> little
>>>> bit of a PITA because timing is against both clock edges.  One way
>>>> around that is to perform separate captures on each clock edge.
>>>>
>>>> Steve
>>>> On 10/9/2012 12:40 AM, Hermann Ruckerbauer wrote:
>>>>> Hello,
>>>>>
>>>>> there is no real eye mask for DDR2/DDR3. On can generate some AC/DC
>>>>> based eye opening, but this is not correct as DRAMs do have a source
>>>>> snyc edge by edge specification instead of an eye mask.
>>>>> Some time ago I generated a movie/presentation that you can
>>>>> download on
>>>>> my website.
>>>>>
>>>>> Go to     www.EyeKnowHow.de
>>>>> under Download/Movies you will find a DDR3_SetupHold_tutorial at the
>>>>> bottom. This was done for DDR3, but is basically valid for DDR2 as
>>>>> well..
>>>>>
>>>>> For anybody how is interested there in more detail: just visit our
>>>>> Seminar  (see below) ;-)
>>>>>
>>>>>
>>>>> Hermann
>>>>>
>>>>> Our next Events:
>>>>> ================
>>>>>
>>>>> "Open the Black Box of Memory"
>>>>> Seminar on 08/09. November 2012
>>>>>
>>>>> Check our website or contact us for details
>>>>>
>>>>> EKH - EyeKnowHow
>>>>> Hermann Ruckerbauer
>>>>> www.EyeKnowHow.de
>>>>> Hermann.Ruckerbauer@xxxxxxxxxxxxx
>>>>> Veilchenstrasse 1
>>>>> 94554 Moos
>>>>> Tel.:    +49 (0)9938 / 902 083
>>>>> Mobile:    +49 (0)176  / 787 787 77
>>>>> Fax:    +49 (0)3212 / 121 9008
>>>>>
>>>>> schrieb danko miocinovic:
>>>>>> Dear Experts,
>>>>>> I am doing some verification of LPDDR2 memories and my question is
>>>>>> about creating eye-diagrams. I got some material from Agilent but
>>>>>> it gives not enough details.
>>>>>> How do you create eye-diagram mask, what are the boundaries? If we
>>>>>> imagine the central romboid of a mask, I am interested if there is
>>>>>> some detailed tutorial about setting those boundaries.
>>>>>> If I have e.g. 533 memory and I know exactly what the frequency
>>>>>> is, I can calculate the UI x-size and easily create it.
>>>>>> What are boundaries for Y coordinates in this central part
>>>>>> (grayed-out area), how to create them? Do I put some minimal or
>>>>>> maximal values there (maximum values sound as the worst case)?
>>>>>>
>>>>>> I hope I was clear enough about what I would like to know, if not
>>>>>> I could provide more info.
>>>>>>
>>>>>> Thank you.
>>>>>>
>>>>>>
>>>>>>        Kind regards,
>>>>>>     Danko Miocinovic
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>


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