[SI-LIST] Re: DDR2 IMPEDANCE
- From: Kenny Frohlich <kenny_frohlich@xxxxxxxxx>
- To: tao xu <helen.tao.xu@xxxxxxxxx>, jory_mckinley@xxxxxxxxx
- Date: Sun, 3 Dec 2006 08:57:00 -0800 (PST)
Hello Tao,
I'm interested in trace impedance on board.
I have always thought that the impedance of CLKs is 100 Ohms (differential)
and the impedance of other signals (DQ, DQM, DQS, Addr, Commands) is 50 - 60
Ohms (single-ended). However, Intel, AMD, and SDRAM vendors all specifies
different impedance values so I got confused and posed my questions. Also, I
can not find any information on impedance in DDR2 standard spec.
Thanks,
Kenny
tao xu <helen.tao.xu@xxxxxxxxx> wrote:
for trace impedance. it is normally 50 or 60 ohm based on my previous
experince. Clock singal sometimes has lower impedance trace than other
signal groups.
On 12/1/06, tao xu wrote:
> kenny, what kind of impedance did you ask? Buffer output impedance for
> interface or normal trace impedance on board?
>
> On 12/1/06, Jory McKinley wrote:
> > Hello Kenny,
> > Are you designing this type interface? If so then take a look at the AMCC
> > spec:
> > https://www.amcc.com/MyAMCC/retrieveDocument/PowerPC/440EP/PPC440EP_DS2002_v1_24.pdf
> >
> > There should be some board guideline information for the DDR interface. You
> > will have to simulate.
> >
> > Simulating an existing interface? If you can obtain a board file then the
> > traces (impedances) can be extracted for the interface.
> >
> > -Jory
> >
> >
> > Kenny Frohlich wrote: Hi All,
> > Can someone please tell me where I can find information on DDR2 impedances
> > (ie. what is the impedance of CLK? Data? Address? Command?)?
> > We use PowerPC PPC440EP and on-board DDR2 SDRAMs.
> > Thank you.
> >
> > Regards,
> > Kenny
> >
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