I have seen references that have Vref bypass capacitors to both VDD and GND. Other references have capacitors only to GND. Is it really necessary to have "balanced" capacitors on the Vref lines? Why? If the "balanced" design is desirable, would an X2Y capacitor be a good choice, since it is "2 capacitors in one"? Regards, Chris Johnson ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List FAQ wiki page is located at: http://si-list.org/wiki/wiki.pl?Si-List_FAQ List technical documents are available at: http://www.si-list.org List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu