I apologize for what might be a simple question... Assuming no other interfaces are in close proximity to a DDR DRAM databus, is it true that one does not have to worry about crosstalk between the data bits (or other DRAM signals for that matter)? Let's say the traces are only 4 inches long on a PCB. And assume the case when a write is occurring. Since, the controller is not receiving at the time, is it safe to assume that whatever crosstalk interference there may be will "settle-out" by the time the DQS strobes the data in? It seems to me that the real worry is only crosstalk from interfaces not related to the DRAM bus, that could be potentially be switching at the same time the data is latching into the DRAM. Is this thinking sound? -Chris ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List FAQ wiki page is located at: http://si-list.org/wiki/wiki.pl?Si-List_FAQ List technical documents are available at: http://www.si-list.org List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu